[coreboot-gerrit] Patch merged into coreboot/master: 32ab283 cpu: Add CPU microcode file to cbfs with 16-byte alignment

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 32ab283b1086ef53fadcd4be92df6e41c5d06438
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Tue Jun 11 16:36:37 2013 -0500

    cpu: Add CPU microcode file to cbfs with 16-byte alignment
    
    On x86 there is a 16-byte alignment requirement for the
    addresses containing the CPU microcode. The cbfs files
    containing the microcode are used in memory-mapped fashion
    when loading new mircocode. Therefore, the data payload's
    address/offset of a cbfs file in flash dictates the resulting
    alignment. Fix this by processing the CPU microcode cbfs
    file separately as it uses $(CBFSTOOL) to find the proper
    location within the provided rom image.
    
    Change-Id: Ia200d62dbcf7ff1fa59598654718a0b7e178ca4c
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Signed-off-by: Gabe Black <gabeblack at chromium.org>
    Reviewed-on: http://review.coreboot.org/3663
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See http://review.coreboot.org/3663 for details.

-gerrit