[coreboot-gerrit] Patch set updated for coreboot: 4cf5b2b snow: Add flush to UART driver.
Gabe Black (gabeblack@chromium.org)
gerrit at coreboot.org
Tue Jul 9 22:42:38 CEST 2013
Gabe Black (gabeblack at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3698
-gerrit
commit 4cf5b2b766ebb5f75f3f898b7b23662a44f1a282
Author: Hung-Te Lin <hungte at chromium.org>
Date: Wed Jun 5 14:06:55 2013 -0700
snow: Add flush to UART driver.
Wait for UART FIFO to be ready.
(Credit to dhendrix for finding the bits to test with.)
Change-Id: Ib6733e422cbc1c61b942bd90d85f88a3f412d6ff
Signed-off-by: Hung-Te Lin <hungte at chromium.org>
Signed-off-by: Gabe Black <gabeblack at chromium.org>
---
src/cpu/samsung/exynos5250/uart.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c
index 24812ae..41dc709 100644
--- a/src/cpu/samsung/exynos5250/uart.c
+++ b/src/cpu/samsung/exynos5250/uart.c
@@ -162,12 +162,19 @@ static void exynos5_uart_tx_byte(unsigned char data)
writeb(data, &uart->utxh);
}
+static void exynos5_uart_tx_flush(void)
+{
+ struct s5p_uart *uart = (struct s5p_uart *)base_port;
+
+ while (readl(&uart->ufstat) & 0x1ff0000);
+}
+
#if !defined(__PRE_RAM__)
static const struct console_driver exynos5_uart_console __console = {
.init = exynos5_init_dev,
.tx_byte = exynos5_uart_tx_byte,
-// .tx_flush = exynos5_uart_tx_flush,
+ .tx_flush = exynos5_uart_tx_flush,
.rx_byte = exynos5_uart_rx_byte,
// .tst_byte = exynos5_uart_tst_byte,
};
@@ -196,6 +203,7 @@ void uart_tx_byte(unsigned char data)
void uart_tx_flush(void)
{
+ exynos5_uart_tx_flush();
}
#endif
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