[coreboot-gerrit] New patch to review for coreboot: 56af8d5 exynos5420: Clear the framebuffer before making it uncacheable

[Gabe Black (gabeblack@chromium.org)]

Gabe Black (gabeblack at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3668

-gerrit

commit 56af8d54b45160b18daa2d03f63ed3f68aadfe63
Author: Stefan Reinauer <reinauer at chromium.org>
Date:   Mon May 20 15:24:13 2013 -0700

    exynos5420: Clear the framebuffer before making it uncacheable
    
    If we clear the framebuffer and then flush it back to memory using cache
    operations, the writes are going to be full cachelines at a time. If we
    make it uncacheable first, the writes will be serialized writes of
    whatever sized chunks memset uses, probably 4 bytes or less.
    
    Change-Id: I960f87a370e97f9e91236ad796d931573bb3dbb8
    Signed-off-by: Stefan Reinauer <reinauer at chromium.org>
    Signed-off-by: Gabe Black <gabeblack at chromium.org>
---
 src/cpu/samsung/exynos5420/cpu.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/cpu/samsung/exynos5420/cpu.c b/src/cpu/samsung/exynos5420/cpu.c
index 1d51174..6e360bf 100644
--- a/src/cpu/samsung/exynos5420/cpu.c
+++ b/src/cpu/samsung/exynos5420/cpu.c
@@ -97,6 +97,8 @@ static void exynos_displayport_init(device_t dev)
 	lcdbase = (uintptr_t)cbmem_add(CBMEM_ID_CONSOLE, fb_size);
 	printk(BIOS_SPEW, "LCD framebuffer base is %p\n", (void *)(lcdbase));
 
+	memset((void *)lcdbase, 0, fb_size);	/* clear the framebuffer */
+
 	/*
 	 * We need to clean and invalidate the framebuffer region and disable
 	 * caching as well. We assume that our dcache <--> memory address
@@ -114,7 +116,6 @@ static void exynos_displayport_init(device_t dev)
 	mmio_resource(dev, 1, lcdbase/KiB, (fb_size + KiB - 1)/KiB);
 	printk(BIOS_DEBUG,
 	       "Initializing Exynos VGA, base %p\n", (void *)lcdbase);
-	memset((void *)lcdbase, 0, fb_size);	/* clear the framebuffer */
 	ret = lcd_ctrl_init(fb_size, &panel, (void *)lcdbase);
 }