[coreboot-gerrit] Patch set updated for coreboot: da9b432 haswell: Add pei_data field for USB routing

Patrick Georgi (patrick@georgi-clan.de) gerrit at coreboot.org
Fri Dec 20 23:31:40 CET 2013


Patrick Georgi (patrick at georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4403

-gerrit

commit da9b4326419f8ccc8bee12411b1269902fe999e8
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Tue Jul 30 15:41:42 2013 -0700

    haswell: Add pei_data field for USB routing
    
    The linux kernel will unconditionally route all USB
    ports to the XCHI controller at boot.  The EHCI controller
    can then be disabled, and it should be left disabled
    by the reference code when this is done.
    
    However not all OS may do this unconditional route,
    so provide an option to the reference code binary to
    enable this behavior.
    
    Change-Id: Iedf5af54182bf109cd1119c1999e46300665d41e
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Reviewed-on: https://gerrit.chromium.org/gerrit/63797
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
 src/northbridge/intel/haswell/pei_data.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/northbridge/intel/haswell/pei_data.h b/src/northbridge/intel/haswell/pei_data.h
index b7dc8cf..f9d6e8b 100644
--- a/src/northbridge/intel/haswell/pei_data.h
+++ b/src/northbridge/intel/haswell/pei_data.h
@@ -31,7 +31,7 @@
 #define PEI_DATA_H
 
 typedef void (*tx_byte_func)(unsigned char byte);
-#define PEI_VERSION 13
+#define PEI_VERSION 14
 
 #define MAX_USB2_PORTS 16
 #define MAX_USB3_PORTS 16
@@ -103,6 +103,8 @@ struct pei_data
 	 * 1067, 1333, 1600
 	 */
 	uint32_t max_ddr3_freq;
+	/* Route all USB ports to XHCI controller in resume path */
+	int usb_xhci_on_resume;
 	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS];
 	struct usb3_port_setting usb3_ports[MAX_USB3_PORTS];
 	uint8_t spd_data[4][256];



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