[coreboot-gerrit] Patch set updated for coreboot: 6690a2a cpu/amd (non-AGESA): Replace UPDATE_CPU_MICROCODE with SUPPORT_UCODE_IN_CBFS

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Thu Dec 12 09:33:52 CET 2013


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4503

-gerrit

commit 6690a2a8470c2ffeaf60b85c14a1a78dbe6f2d64
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Sun Dec 8 07:56:34 2013 +0200

    cpu/amd (non-AGESA): Replace UPDATE_CPU_MICROCODE with SUPPORT_UCODE_IN_CBFS
    
    Change-Id: I71e5b19bf451cef857cad2e2bb4bd8cc19d0ddd0
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/cpu/amd/microcode/Makefile.inc   |  4 ++--
 src/cpu/amd/model_10xxx/Kconfig      | 33 +--------------------------------
 src/cpu/amd/model_10xxx/Makefile.inc |  2 +-
 src/cpu/amd/model_fxx/Kconfig        |  1 +
 src/cpu/amd/model_fxx/Makefile.inc   |  2 +-
 src/include/cpu/amd/microcode.h      |  2 +-
 6 files changed, 7 insertions(+), 37 deletions(-)

diff --git a/src/cpu/amd/microcode/Makefile.inc b/src/cpu/amd/microcode/Makefile.inc
index 48f1d0d..6da939e 100644
--- a/src/cpu/amd/microcode/Makefile.inc
+++ b/src/cpu/amd/microcode/Makefile.inc
@@ -1,2 +1,2 @@
-ramstage-y += microcode.c
-romstage-$(CONFIG_UPDATE_CPU_MICROCODE) += microcode.c
+ramstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c
+romstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c
diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig
index 99358e0..2e46f1c 100644
--- a/src/cpu/amd/model_10xxx/Kconfig
+++ b/src/cpu/amd/model_10xxx/Kconfig
@@ -5,6 +5,7 @@ config CPU_AMD_MODEL_10XXX
 	select MMCONF_SUPPORT_DEFAULT
 	select TSC_SYNC_LFENCE
 	select UDELAY_LAPIC
+	select SUPPORT_CPU_UCODE_IN_CBFS
 
 if CPU_AMD_MODEL_10XXX
 
@@ -62,36 +63,4 @@ config UDELAY_LAPIC_FIXED_FSB
 	int
 	default 200
 
-config UPDATE_CPU_MICROCODE
-	bool
-	default y
-
-config UPDATE_CPU_MICROCODE
-	bool "Update CPU microcode"
-	default y
-	depends on EXPERT && CPU_AMD_MODEL_10XXX
-	help
-	  Select this to apply patches to the CPU microcode provided by
-	  AMD without source, and distributed with coreboot, to address
-	  issues in the CPU post production.
-
-	  Microcode updates distributed with coreboot are not necessarily
-	  the latest version available from AMD. Updates are only applied
-	  if they are newer than the microcode already in your CPU.
-
-	  Unselect this to let Fam10h CPUs run with microcode as shipped
-	  from factory. No binary microcode patches will be included in the
-	  coreboot image in that case, which can help with creating an image
-	  for which complete source code is available, which in turn might
-	  simplify license compliance.
-
-	  Microcode updates intend to solve issues that have been discovered
-	  after CPU production. The common case is that systems work as
-	  intended with updated microcode, but we have also seen cases where
-	  issues were solved by not applying the microcode updates.
-
-	  Note that some operating system include these same microcode
-	  patches, so you may need to also disable microcode updates in
-	  your operating system in order for this option to matter.
-
 endif	# CPU_AMD_MODEL_10XXX
diff --git a/src/cpu/amd/model_10xxx/Makefile.inc b/src/cpu/amd/model_10xxx/Makefile.inc
index 1c9dc53..8513fe8 100644
--- a/src/cpu/amd/model_10xxx/Makefile.inc
+++ b/src/cpu/amd/model_10xxx/Makefile.inc
@@ -1,6 +1,6 @@
 ramstage-y += model_10xxx_init.c
 ramstage-y += processor_name.c
 
-romstage-$(CONFIG_UPDATE_CPU_MICROCODE) += update_microcode.c
+romstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += update_microcode.c
 
 cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
diff --git a/src/cpu/amd/model_fxx/Kconfig b/src/cpu/amd/model_fxx/Kconfig
index fb094b1..85bd1f9 100644
--- a/src/cpu/amd/model_fxx/Kconfig
+++ b/src/cpu/amd/model_fxx/Kconfig
@@ -5,6 +5,7 @@ config CPU_AMD_MODEL_FXX
 	select SSE2
 	select TSC_SYNC_LFENCE
 	select UDELAY_LAPIC
+	select SUPPORT_CPU_UCODE_IN_CBFS
 
 if CPU_AMD_MODEL_FXX
 config UDELAY_IO
diff --git a/src/cpu/amd/model_fxx/Makefile.inc b/src/cpu/amd/model_fxx/Makefile.inc
index 1437e88..ab068bf 100644
--- a/src/cpu/amd/model_fxx/Makefile.inc
+++ b/src/cpu/amd/model_fxx/Makefile.inc
@@ -1,6 +1,6 @@
 # no conditionals here. If you include this file from a socket, then you get all the binaries.
 ramstage-y += model_fxx_init.c
-ramstage-y += model_fxx_update_microcode.c
+ramstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += model_fxx_update_microcode.c
 ramstage-y += processor_name.c
 ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += powernow_acpi.c
 
diff --git a/src/include/cpu/amd/microcode.h b/src/include/cpu/amd/microcode.h
index 9876a24..cec5e58 100644
--- a/src/include/cpu/amd/microcode.h
+++ b/src/include/cpu/amd/microcode.h
@@ -1,7 +1,7 @@
 #ifndef CPU_AMD_MICROCODE_H
 #define CPU_AMD_MICROCODE_H
 
-#if CONFIG_UPDATE_CPU_MICROCODE || CONFIG_NORTHBRIDGE_AMD_AMDK8
+#if CONFIG_SUPPORT_CPU_UCODE_IN_CBFS
 void update_microcode(u32 cpu_deviceid);
 void amd_update_microcode_from_cbfs(u32 equivalent_processor_rev_id);
 #else



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