[coreboot-gerrit] Patch set updated for coreboot: 39ba75f Correct file permissions.
Idwer Vollering (vidwer@gmail.com)
gerrit at coreboot.org
Fri Dec 6 22:24:10 CET 2013
Idwer Vollering (vidwer at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4490
-gerrit
commit 39ba75f22442e2379fcc4c58bce73b685cf9b077
Author: Idwer Vollering <vidwer at gmail.com>
Date: Fri Dec 6 22:02:47 2013 +0000
Correct file permissions.
Some files have incorrect/odd permissions,
correct them: remove unnecessary +x flags.
Change-Id: I784e6e599dfee88239f85bb58323aae9e40fb21c
Signed-off-by: Idwer Vollering <vidwer at gmail.com>
---
src/cpu/amd/agesa/cache_as_ram.inc | 0
src/cpu/amd/agesa/family10/Kconfig | 0
src/cpu/amd/agesa/family10/Makefile.inc | 0
src/cpu/amd/agesa/family12/Kconfig | 0
src/cpu/amd/agesa/family12/Makefile.inc | 0
src/cpu/amd/agesa/family15tn/acpi/cpu.asl | 0
src/include/device/azalia.h | 0
src/mainboard/amd/olivehill/acpi/superio.asl | 0
src/mainboard/amd/olivehill/acpi/thermal.asl | 0
src/mainboard/amd/torpedo/acpi/ide.asl | 0
src/mainboard/amd/torpedo/acpi/routing.asl | 0
src/mainboard/amd/torpedo/acpi/sata.asl | 0
src/mainboard/amd/torpedo/acpi/ssdt2.asl | 0
src/mainboard/amd/torpedo/acpi/ssdt3.asl | 0
src/mainboard/amd/torpedo/acpi/ssdt4.asl | 0
src/mainboard/amd/torpedo/acpi/ssdt5.asl | 0
src/mainboard/amd/torpedo/acpi/usb.asl | 0
src/mainboard/amd/torpedo/cmos.layout | 0
src/mainboard/amd/torpedo/devicetree.cb | 0
src/mainboard/amd/torpedo/dsdt.asl | 0
src/mainboard/asrock/imb-a180/acpi/superio.asl | 0
src/mainboard/asrock/imb-a180/acpi/thermal.asl | 0
src/northbridge/amd/agesa/family10/Kconfig | 0
src/northbridge/amd/agesa/family10/Makefile.inc | 0
src/northbridge/amd/agesa/family10/ssdt.asl | 0
src/northbridge/amd/agesa/family12/Kconfig | 0
src/northbridge/amd/agesa/family12/Makefile.inc | 0
src/northbridge/amd/agesa/family12/ssdt.asl | 0
src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl | 0
src/southbridge/amd/agesa/hudson/acpi/audio.asl | 0
src/southbridge/amd/agesa/hudson/acpi/fch.asl | 0
src/southbridge/amd/agesa/hudson/acpi/lpc.asl | 0
src/southbridge/amd/agesa/hudson/acpi/pci_int.asl | 0
src/southbridge/amd/agesa/hudson/acpi/pcie.asl | 0
src/southbridge/amd/agesa/hudson/acpi/sleepstates.asl | 0
src/southbridge/amd/agesa/hudson/acpi/smbus.asl | 0
src/southbridge/amd/agesa/hudson/acpi/usb.asl | 0
src/southbridge/amd/cimx/sb900/Kconfig | 0
src/southbridge/amd/cimx/sb900/Makefile.inc | 0
src/superio/nuvoton/nct5104d/Makefile.inc | 0
src/superio/nuvoton/nct5104d/early_init.c | 0
src/superio/nuvoton/nct5104d/nct5104d.h | 0
src/superio/nuvoton/nct5104d/superio.c | 0
src/vendorcode/amd/agesa/f10/Legacy/PlatformMemoryConfiguration.inc | 0
src/vendorcode/amd/agesa/f10/Legacy/Proc/arch2008.asm | 0
src/vendorcode/amd/agesa/f10/Legacy/agesa.inc | 0
src/vendorcode/amd/agesa/f10/Legacy/amd.inc | 0
src/vendorcode/amd/agesa/f10/Legacy/bridge32.inc | 0
src/vendorcode/amd/agesa/f10/Lib/IA32/amdlib32.asm | 0
src/vendorcode/amd/agesa/f10/Lib/IA32/ms_shift.asm | 0
src/vendorcode/amd/agesa/f10/Lib/IA32/msmemcpy.asm | 0
src/vendorcode/amd/agesa/f10/Lib/x64/amdlib64.asm | 0
src/vendorcode/amd/agesa/f10/Makefile.inc | 0
src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevD32.asm | 0
src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevD64.asm | 0
src/vendorcode/amd/agesa/f10/Proc/CPU/cahalt.asm | 0
src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib32.asm | 0
src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib64.asm | 0
src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mu.asm | 0
src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mru.asm | 0
src/vendorcode/amd/agesa/f10/cpcar.inc | 0
src/vendorcode/amd/agesa/f10/cpcarmac.inc | 0
src/vendorcode/amd/agesa/f10/gcccar.inc | 0
src/vendorcode/amd/agesa/f12/Legacy/PlatformMemoryConfiguration.inc | 0
src/vendorcode/amd/agesa/f12/Legacy/Proc/arch2008.asm | 0
src/vendorcode/amd/agesa/f12/Legacy/agesa.inc | 0
src/vendorcode/amd/agesa/f12/Legacy/amd.inc | 0
src/vendorcode/amd/agesa/f12/Legacy/bridge32.inc | 0
src/vendorcode/amd/agesa/f12/Makefile.inc | 0
.../amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibConfig.esl | 0
.../amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibCore.esl | 0
.../amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibHotplug.esl | 0
.../amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibPspp.esl | 0
.../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSmuLib.esl | 0
src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlib.esl | 0
src/vendorcode/amd/agesa/f12/cpcar.inc | 0
src/vendorcode/amd/agesa/f12/cpcarmac.inc | 0
src/vendorcode/amd/agesa/f12/gcccar.inc | 0
src/vendorcode/amd/cimx/sb900/Makefile.inc | 0
src/vendorcode/amd/cimx/sb900/OEM.h | 0
src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspapi.h | 0
src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspffs.h | 0
src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspfv.h | 0
src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fsphob.h | 0
src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspinfoheader.h | 0
src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspplatform.h | 0
src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fsptypes.h | 0
src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/mem_config.h | 0
src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/peifsp.h | 0
89 files changed, 0 insertions(+), 0 deletions(-)
diff --git a/src/cpu/amd/agesa/cache_as_ram.inc b/src/cpu/amd/agesa/cache_as_ram.inc
old mode 100755
new mode 100644
diff --git a/src/cpu/amd/agesa/family10/Kconfig b/src/cpu/amd/agesa/family10/Kconfig
old mode 100755
new mode 100644
diff --git a/src/cpu/amd/agesa/family10/Makefile.inc b/src/cpu/amd/agesa/family10/Makefile.inc
old mode 100755
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diff --git a/src/cpu/amd/agesa/family12/Kconfig b/src/cpu/amd/agesa/family12/Kconfig
old mode 100755
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diff --git a/src/cpu/amd/agesa/family12/Makefile.inc b/src/cpu/amd/agesa/family12/Makefile.inc
old mode 100755
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diff --git a/src/cpu/amd/agesa/family15tn/acpi/cpu.asl b/src/cpu/amd/agesa/family15tn/acpi/cpu.asl
old mode 100755
new mode 100644
diff --git a/src/include/device/azalia.h b/src/include/device/azalia.h
old mode 100755
new mode 100644
diff --git a/src/mainboard/amd/olivehill/acpi/superio.asl b/src/mainboard/amd/olivehill/acpi/superio.asl
old mode 100755
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diff --git a/src/mainboard/amd/olivehill/acpi/thermal.asl b/src/mainboard/amd/olivehill/acpi/thermal.asl
old mode 100755
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diff --git a/src/mainboard/amd/torpedo/acpi/ide.asl b/src/mainboard/amd/torpedo/acpi/ide.asl
old mode 100755
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diff --git a/src/mainboard/amd/torpedo/acpi/routing.asl b/src/mainboard/amd/torpedo/acpi/routing.asl
old mode 100755
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diff --git a/src/mainboard/amd/torpedo/acpi/sata.asl b/src/mainboard/amd/torpedo/acpi/sata.asl
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diff --git a/src/mainboard/amd/torpedo/acpi/ssdt2.asl b/src/mainboard/amd/torpedo/acpi/ssdt2.asl
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diff --git a/src/mainboard/amd/torpedo/acpi/ssdt3.asl b/src/mainboard/amd/torpedo/acpi/ssdt3.asl
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diff --git a/src/mainboard/amd/torpedo/acpi/ssdt4.asl b/src/mainboard/amd/torpedo/acpi/ssdt4.asl
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diff --git a/src/mainboard/amd/torpedo/acpi/ssdt5.asl b/src/mainboard/amd/torpedo/acpi/ssdt5.asl
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diff --git a/src/mainboard/amd/torpedo/acpi/usb.asl b/src/mainboard/amd/torpedo/acpi/usb.asl
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diff --git a/src/mainboard/amd/torpedo/cmos.layout b/src/mainboard/amd/torpedo/cmos.layout
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diff --git a/src/mainboard/amd/torpedo/devicetree.cb b/src/mainboard/amd/torpedo/devicetree.cb
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diff --git a/src/mainboard/amd/torpedo/dsdt.asl b/src/mainboard/amd/torpedo/dsdt.asl
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diff --git a/src/mainboard/asrock/imb-a180/acpi/superio.asl b/src/mainboard/asrock/imb-a180/acpi/superio.asl
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diff --git a/src/mainboard/asrock/imb-a180/acpi/thermal.asl b/src/mainboard/asrock/imb-a180/acpi/thermal.asl
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diff --git a/src/northbridge/amd/agesa/family10/Kconfig b/src/northbridge/amd/agesa/family10/Kconfig
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diff --git a/src/northbridge/amd/agesa/family10/Makefile.inc b/src/northbridge/amd/agesa/family10/Makefile.inc
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diff --git a/src/northbridge/amd/agesa/family10/ssdt.asl b/src/northbridge/amd/agesa/family10/ssdt.asl
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diff --git a/src/northbridge/amd/agesa/family12/Kconfig b/src/northbridge/amd/agesa/family12/Kconfig
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diff --git a/src/northbridge/amd/agesa/family12/Makefile.inc b/src/northbridge/amd/agesa/family12/Makefile.inc
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diff --git a/src/northbridge/amd/agesa/family12/ssdt.asl b/src/northbridge/amd/agesa/family12/ssdt.asl
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diff --git a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl
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diff --git a/src/southbridge/amd/agesa/hudson/acpi/audio.asl b/src/southbridge/amd/agesa/hudson/acpi/audio.asl
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diff --git a/src/southbridge/amd/agesa/hudson/acpi/fch.asl b/src/southbridge/amd/agesa/hudson/acpi/fch.asl
old mode 100755
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diff --git a/src/southbridge/amd/agesa/hudson/acpi/lpc.asl b/src/southbridge/amd/agesa/hudson/acpi/lpc.asl
old mode 100755
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diff --git a/src/southbridge/amd/agesa/hudson/acpi/pci_int.asl b/src/southbridge/amd/agesa/hudson/acpi/pci_int.asl
old mode 100755
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diff --git a/src/southbridge/amd/agesa/hudson/acpi/pcie.asl b/src/southbridge/amd/agesa/hudson/acpi/pcie.asl
old mode 100755
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diff --git a/src/southbridge/amd/agesa/hudson/acpi/sleepstates.asl b/src/southbridge/amd/agesa/hudson/acpi/sleepstates.asl
old mode 100755
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diff --git a/src/southbridge/amd/agesa/hudson/acpi/smbus.asl b/src/southbridge/amd/agesa/hudson/acpi/smbus.asl
old mode 100755
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diff --git a/src/southbridge/amd/agesa/hudson/acpi/usb.asl b/src/southbridge/amd/agesa/hudson/acpi/usb.asl
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diff --git a/src/southbridge/amd/cimx/sb900/Kconfig b/src/southbridge/amd/cimx/sb900/Kconfig
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diff --git a/src/southbridge/amd/cimx/sb900/Makefile.inc b/src/southbridge/amd/cimx/sb900/Makefile.inc
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diff --git a/src/superio/nuvoton/nct5104d/Makefile.inc b/src/superio/nuvoton/nct5104d/Makefile.inc
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diff --git a/src/superio/nuvoton/nct5104d/early_init.c b/src/superio/nuvoton/nct5104d/early_init.c
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diff --git a/src/superio/nuvoton/nct5104d/nct5104d.h b/src/superio/nuvoton/nct5104d/nct5104d.h
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diff --git a/src/superio/nuvoton/nct5104d/superio.c b/src/superio/nuvoton/nct5104d/superio.c
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diff --git a/src/vendorcode/amd/agesa/f10/Legacy/PlatformMemoryConfiguration.inc b/src/vendorcode/amd/agesa/f10/Legacy/PlatformMemoryConfiguration.inc
old mode 100755
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diff --git a/src/vendorcode/amd/agesa/f10/Legacy/Proc/arch2008.asm b/src/vendorcode/amd/agesa/f10/Legacy/Proc/arch2008.asm
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diff --git a/src/vendorcode/amd/agesa/f10/Legacy/agesa.inc b/src/vendorcode/amd/agesa/f10/Legacy/agesa.inc
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diff --git a/src/vendorcode/amd/agesa/f10/Legacy/amd.inc b/src/vendorcode/amd/agesa/f10/Legacy/amd.inc
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diff --git a/src/vendorcode/amd/agesa/f10/Legacy/bridge32.inc b/src/vendorcode/amd/agesa/f10/Legacy/bridge32.inc
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diff --git a/src/vendorcode/amd/agesa/f10/Lib/IA32/amdlib32.asm b/src/vendorcode/amd/agesa/f10/Lib/IA32/amdlib32.asm
old mode 100755
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diff --git a/src/vendorcode/amd/agesa/f10/Lib/IA32/ms_shift.asm b/src/vendorcode/amd/agesa/f10/Lib/IA32/ms_shift.asm
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diff --git a/src/vendorcode/amd/agesa/f10/Lib/IA32/msmemcpy.asm b/src/vendorcode/amd/agesa/f10/Lib/IA32/msmemcpy.asm
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diff --git a/src/vendorcode/amd/agesa/f10/Lib/x64/amdlib64.asm b/src/vendorcode/amd/agesa/f10/Lib/x64/amdlib64.asm
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diff --git a/src/vendorcode/amd/agesa/f10/Makefile.inc b/src/vendorcode/amd/agesa/f10/Makefile.inc
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diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevD32.asm b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevD32.asm
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diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevD64.asm b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevD64.asm
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diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cahalt.asm b/src/vendorcode/amd/agesa/f10/Proc/CPU/cahalt.asm
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diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib32.asm b/src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib32.asm
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diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib64.asm b/src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib64.asm
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diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mu.asm b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mu.asm
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diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mru.asm b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mru.asm
old mode 100755
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diff --git a/src/vendorcode/amd/agesa/f10/cpcar.inc b/src/vendorcode/amd/agesa/f10/cpcar.inc
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diff --git a/src/vendorcode/amd/agesa/f10/cpcarmac.inc b/src/vendorcode/amd/agesa/f10/cpcarmac.inc
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diff --git a/src/vendorcode/amd/agesa/f10/gcccar.inc b/src/vendorcode/amd/agesa/f10/gcccar.inc
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diff --git a/src/vendorcode/amd/agesa/f12/Legacy/PlatformMemoryConfiguration.inc b/src/vendorcode/amd/agesa/f12/Legacy/PlatformMemoryConfiguration.inc
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diff --git a/src/vendorcode/amd/agesa/f12/Legacy/Proc/arch2008.asm b/src/vendorcode/amd/agesa/f12/Legacy/Proc/arch2008.asm
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diff --git a/src/vendorcode/amd/agesa/f12/Legacy/agesa.inc b/src/vendorcode/amd/agesa/f12/Legacy/agesa.inc
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diff --git a/src/vendorcode/amd/agesa/f12/Legacy/amd.inc b/src/vendorcode/amd/agesa/f12/Legacy/amd.inc
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diff --git a/src/vendorcode/amd/agesa/f12/Legacy/bridge32.inc b/src/vendorcode/amd/agesa/f12/Legacy/bridge32.inc
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diff --git a/src/vendorcode/amd/agesa/f12/Makefile.inc b/src/vendorcode/amd/agesa/f12/Makefile.inc
old mode 100755
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diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibConfig.esl b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibConfig.esl
old mode 100755
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diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibCore.esl b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibCore.esl
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diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibHotplug.esl b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibHotplug.esl
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diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibPspp.esl b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibPspp.esl
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diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSmuLib.esl b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSmuLib.esl
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diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlib.esl b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlib.esl
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diff --git a/src/vendorcode/amd/agesa/f12/cpcar.inc b/src/vendorcode/amd/agesa/f12/cpcar.inc
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diff --git a/src/vendorcode/amd/agesa/f12/cpcarmac.inc b/src/vendorcode/amd/agesa/f12/cpcarmac.inc
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diff --git a/src/vendorcode/amd/agesa/f12/gcccar.inc b/src/vendorcode/amd/agesa/f12/gcccar.inc
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diff --git a/src/vendorcode/amd/cimx/sb900/Makefile.inc b/src/vendorcode/amd/cimx/sb900/Makefile.inc
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diff --git a/src/vendorcode/amd/cimx/sb900/OEM.h b/src/vendorcode/amd/cimx/sb900/OEM.h
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diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspapi.h b/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspapi.h
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diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspffs.h b/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspffs.h
old mode 100755
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diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspfv.h b/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspfv.h
old mode 100755
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diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fsphob.h b/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fsphob.h
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diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspinfoheader.h b/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspinfoheader.h
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diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspplatform.h b/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspplatform.h
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diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fsptypes.h b/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fsptypes.h
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diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/mem_config.h b/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/mem_config.h
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diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/peifsp.h b/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/peifsp.h
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