[coreboot-gerrit] Patch merged into coreboot/master: 4a1595a Fix Makefile to include all copies of the SPD sources
gerrit at coreboot.org
gerrit at coreboot.org
Thu Dec 5 19:28:42 CET 2013
the following patch was just integrated into master:
commit 4a1595ac408e567243729df2691b0ab037558770
Author: Duncan Laurie <dlaurie at chromium.org>
Date: Thu Jun 20 14:53:35 2013 -0700
Fix Makefile to include all copies of the SPD sources
On some systems there may be 2GB SKU that is the same as the
4GB SKU but just one channel of memory. In that case we need
to ensure that both copies of the same SPD source end up
populated by ensuring that repeated entries are included by
using $+ instead of $^.
Alternatively we could do the check inside romstage, but it
is already set to behave this way if the SPD gets populated
correctly.
I changed spd_index to 3 in falco romstage to force it to
pretend it was a 2GB config of the same memory, then booted
to ensure it was indeed limited to 2GB.
memcfg channel[0] config (00780008):
ECC inactive
enhanced interleave mode on
rank interleave on
DIMMA 2048 MB width x16 single rank, selected
DIMMB 0 MB width x16 single rank
memcfg channel[1] config (00600000):
ECC inactive
enhanced interleave mode on
rank interleave on
DIMMA 0 MB width x8 single rank, selected
DIMMB 0 MB width x8 single rank
Change-Id: Ibfe5051ccda2fe69e8caff3f3c264116e3411c65
Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/59483
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Tested-by: Jay Kim <yongjaek at chromium.org>
See http://review.coreboot.org/4319 for details.
-gerrit
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