[coreboot-gerrit] New patch to review for coreboot: 8291574 exynos5420: init APLL at 1800MHz

[Stefan Reinauer (stefan.reinauer@coreboot.org)]

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4443

-gerrit

commit 82915744a7f5bd1fd40f32bdfd9bd8ede9e5df5d
Author: David Hendricks <dhendrix at chromium.org>
Date:   Mon Aug 5 21:09:32 2013 -0700

    exynos5420: init APLL at 1800MHz
    
    This initializes the APLL at 1800MHz.
    
    Change-Id: I366bf4e75510847ab93d9c9f214a49c731cca08a
    Reviewed-on: https://gerrit.chromium.org/gerrit/64745
    Reviewed-by: Gabe Black <gabeblack at chromium.org>
    Commit-Queue: David Hendricks <dhendrix at chromium.org>
    Tested-by: David Hendricks <dhendrix at chromium.org>
---
 src/cpu/samsung/exynos5420/clock_init.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/cpu/samsung/exynos5420/clock_init.c b/src/cpu/samsung/exynos5420/clock_init.c
index b62ebe4..3521636 100644
--- a/src/cpu/samsung/exynos5420/clock_init.c
+++ b/src/cpu/samsung/exynos5420/clock_init.c
@@ -65,7 +65,7 @@ void system_clock_init(void)
 
 	/* Set APLL */
 	writel(APLL_CON1_VAL, &clk->apll_con1);
-	val = set_pll(0xc8, 0x3, 0x1);
+	val = set_pll(225, 3, 0);	/* FOUT=1800MHz */
 	writel(val, &clk->apll_con0);
 	while ((readl(&clk->apll_con0) & PLL_LOCKED) == 0)
 		;