[coreboot-gerrit] New patch to review for coreboot: e61d085 peppy: RAM_ID + storage changes for next build.

Stefan Reinauer (stefan.reinauer@coreboot.org) gerrit at coreboot.org
Tue Dec 3 21:44:48 CET 2013


Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4340

-gerrit

commit e61d08542e0b335815a27599f04ff90f9f445b66
Author: Shawn Nematbakhsh <shawnn at chromium.org>
Date:   Wed Jun 26 18:11:23 2013 -0700

    peppy: RAM_ID + storage changes for next build.
    
    - Update RAM_ID table.
    - Add DEVSLP0 signal to NGFF SATA port.
    
    Note: After this change, old Micron 2GB boards will no longer boot.
    
    Signed-off-by: Shawn Nematbakhsh <shawnn at chromium.org>
    
    Change-Id: Id68a1d6ace2702cca9c37305726cd55a0bde5005
    Reviewed-on: https://gerrit.chromium.org/gerrit/60167
    Tested-by: Shawn Nematbakhsh <shawnn at chromium.org>
    Reviewed-by: Dave Parker <dparker at chromium.org>
    Commit-Queue: Dave Parker <dparker at chromium.org>
---
 src/mainboard/google/peppy/gpio.h     | 2 +-
 src/mainboard/google/peppy/romstage.c | 7 +++----
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/src/mainboard/google/peppy/gpio.h b/src/mainboard/google/peppy/gpio.h
index dab086a..32b1928 100644
--- a/src/mainboard/google/peppy/gpio.h
+++ b/src/mainboard/google/peppy/gpio.h
@@ -56,7 +56,7 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = {
 	LP_GPIO_NATIVE,        /* 30: NATIVE: PCH_SUSWARN_L */
 	LP_GPIO_NATIVE,        /* 31: NATIVE: ACPRESENT */
 	LP_GPIO_NATIVE,        /* 32: NATIVE: LPC_CLKRUN_L */
-	LP_GPIO_UNUSED,        /* 33: UNUSED */
+	LP_GPIO_NATIVE,        /* 33: NATIVE: DEVSLP0 */
 	LP_GPIO_ACPI_SMI,      /* 34: EC_SMI_L */
 	LP_GPIO_ACPI_SMI,      /* 35: PCH_NMI_DBG_L (route in NMI_EN) */
 	LP_GPIO_ACPI_SCI,      /* 36: EC_SCI_L */
diff --git a/src/mainboard/google/peppy/romstage.c b/src/mainboard/google/peppy/romstage.c
index bb65f00..bfa1681 100644
--- a/src/mainboard/google/peppy/romstage.c
+++ b/src/mainboard/google/peppy/romstage.c
@@ -92,10 +92,9 @@ static void copy_spd(struct pei_data *peid)
 	if (spd_file->len < sizeof(peid->spd_data[0]))
 		die("Missing SPD data.");
 
-	/* Index 0 is 2GB config with CH0 only. This is suject to change.
-	 * TODO(shawnn): Check the decoding before next build.
-	 */
-	if (spd_index == 0)
+	/* Index 0-2 are 4GB config with both CH0 and CH1
+	 * Index 4-6 are 2GB config with CH0 only */
+	if (spd_index > 3)
 		peid->dimm_channel1_disabled = 3;
 
 	memcpy(peid->spd_data[0],



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