[coreboot-gerrit] New patch to review for coreboot: 4ebfa9a libpayload: Have similar cache api on ARM and x86

[Stefan Reinauer (stefan.reinauer@coreboot.org)]

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4320

-gerrit

commit 4ebfa9a328fe9496b3cb5dff73861850af5c3d4f
Author: Stefan Reinauer <reinauer at chromium.org>
Date:   Tue May 21 12:43:09 2013 -0700

    libpayload: Have similar cache api on ARM and x86
    
    So far this is used by the USB driver, and instead of
    having ifdefs all throughout that code, implement the same
    API on x86 and ARM.
    
    Change-Id: I8093ad818ad2e38a0901787aa8674faf591d580c
    Signed-off-by: Stefan Reinauer <reinauer at google.com>
    Reviewed-on: https://gerrit.chromium.org/gerrit/56105
    Reviewed-by: David Hendricks <dhendrix at chromium.org>
    Commit-Queue: Stefan Reinauer <reinauer at chromium.org>
    Tested-by: Stefan Reinauer <reinauer at chromium.org>
---
 payloads/libpayload/include/x86/arch/cache.h | 41 ++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/payloads/libpayload/include/x86/arch/cache.h b/payloads/libpayload/include/x86/arch/cache.h
new file mode 100644
index 0000000..73849b7
--- /dev/null
+++ b/payloads/libpayload/include/x86/arch/cache.h
@@ -0,0 +1,41 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2013 Google Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * cache.h: Cache maintenance API for x86
+ */
+
+#ifndef __ARCH_CACHE_H__
+#define __ARCH_CACHE_H__
+
+/* These are noops, needed by the USB stack on ARM */
+#define dmb()
+#define dsb()
+#define dcache_clean_invalidate_all()
+#define dcache_clean_invalidate_by_mva(addr, len)
+
+#endif