[coreboot-gerrit] Patch set updated for coreboot: 1af36fc ChromeOS: Move oprom_is_loaded to device
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Tue Dec 3 15:19:48 CET 2013
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4309
-gerrit
commit 1af36fcd0517e3f9604f0b4a642c00a496589ad6
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Thu Nov 28 16:44:51 2013 +0200
ChromeOS: Move oprom_is_loaded to device
Change-Id: I7e1afd752f18e5346dabdee62e4f7ea08ada5faf
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/device/pci_device.c | 11 +++--------
src/include/device/device.h | 1 +
src/mainboard/google/link/i915.c | 4 +---
src/mainboard/google/stout/i915.c | 2 --
src/mainboard/intel/wtm2/i915.c | 2 --
src/northbridge/intel/haswell/gma.c | 16 +++++++++++++---
src/northbridge/intel/sandybridge/gma.c | 14 ++++++++++++--
7 files changed, 30 insertions(+), 20 deletions(-)
diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index 1d998ca..d6ab5c2 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -655,10 +655,6 @@ void pci_dev_set_subsystem(struct device *dev, unsigned vendor, unsigned device)
((device & 0xffff) << 16) | (vendor & 0xffff));
}
-#if CONFIG_CHROMEOS
-int oprom_is_loaded = 0;
-#endif
-
/** Default handler: only runs the relevant PCI BIOS. */
void pci_dev_init(struct device *dev)
{
@@ -703,10 +699,9 @@ void pci_dev_init(struct device *dev)
return;
run_bios(dev, (unsigned long)ram);
-#if CONFIG_CHROMEOS
- oprom_is_loaded = 1;
- printk(BIOS_DEBUG, "VGA Option ROM has been loaded\n");
-#endif
+ dev->oprom_is_loaded = 1;
+ if ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
+ printk(BIOS_DEBUG, "VGA Option ROM has been loaded\n");
#endif /* CONFIG_PCI_ROM_RUN || CONFIG_VGA_ROM_RUN */
}
diff --git a/src/include/device/device.h b/src/include/device/device.h
index c1a2c3d..2f05b1a 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -98,6 +98,7 @@ struct device {
unsigned int enabled : 1; /* set if we should enable the device */
unsigned int initialized : 1; /* set if we have initialized the device */
unsigned int on_mainboard : 1;
+ unsigned int oprom_is_loaded : 1;
struct pci_irq_info pci_irq_info[4];
u8 command;
diff --git a/src/mainboard/google/link/i915.c b/src/mainboard/google/link/i915.c
index 42b9c0f..6c1e20f 100644
--- a/src/mainboard/google/link/i915.c
+++ b/src/mainboard/google/link/i915.c
@@ -58,7 +58,6 @@ static unsigned int graphics;
static unsigned short addrport;
static unsigned short dataport;
static unsigned int physbase;
-extern int oprom_is_loaded;
static u32 htotal, hblank, hsync, vtotal, vblank, vsync;
const u32 link_edid_data[] = {
@@ -399,6 +398,5 @@ int i915lightup(unsigned int pphysbase, unsigned int piobase,
memset((void *)graphics, 0, FRAME_BUFFER_BYTES);
printk(BIOS_SPEW, "%ld microseconds\n", globalmicroseconds());
i915_init_done = 1;
- oprom_is_loaded = 1;
- return 0;
+ return 1;
}
diff --git a/src/mainboard/google/stout/i915.c b/src/mainboard/google/stout/i915.c
index 89a8594..d1f6c86 100644
--- a/src/mainboard/google/stout/i915.c
+++ b/src/mainboard/google/stout/i915.c
@@ -41,7 +41,6 @@ static unsigned int graphics;
static unsigned short addrport;
static unsigned short dataport;
static unsigned int physbase;
-extern int oprom_is_loaded;
#define READ32(addr) io_i915_READ32(addr)
#define WRITE32(val, addr) io_i915_WRITE32(val, addr)
@@ -278,6 +277,5 @@ int i915lightup(unsigned int pphysbase,
memset((void *)graphics, 0, 4520*4096);
printk(BIOS_SPEW, "%ld microseconds\n", globalmicroseconds());
i915_init_done = 1;
- oprom_is_loaded = 1;
return 0;
}
diff --git a/src/mainboard/intel/wtm2/i915.c b/src/mainboard/intel/wtm2/i915.c
index df88138..eae56e1 100644
--- a/src/mainboard/intel/wtm2/i915.c
+++ b/src/mainboard/intel/wtm2/i915.c
@@ -70,7 +70,6 @@ static unsigned int graphics;
static unsigned short addrport;
static unsigned short dataport;
static unsigned int physbase;
-extern int oprom_is_loaded;
const u32 link_edid_data[] = {
0xffffff00, 0x00ffffff, 0x0379e430, 0x00000000,
@@ -220,7 +219,6 @@ int i915lightup(unsigned int pphysbase, unsigned int piobase,
*/
i915_init_done = 1;
- oprom_is_loaded = 1;
return 1;
fail:
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index 467ed93..e828a92 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -27,6 +27,11 @@
#include "chip.h"
#include "haswell.h"
+#if CONFIG_CHROMEOS
+#include <vendorcode/google/chromeos/chromeos.h>
+int oprom_is_loaded = 0;
+#endif
+
/* some vga option roms are used for several chipsets but they only have one
* PCI ID in their header. If we encounter such an option rom, we need to do
* the mapping ourselfes
@@ -185,9 +190,7 @@ static void gma_setup_panel(struct device *dev)
static void gma_pm_init_post_vbios(struct device *dev)
{
- extern int oprom_is_loaded;
-
- if (!oprom_is_loaded) {
+ if (!dev->oprom_is_loaded) {
/* Magic to force graphics into happy state for kernel */
gtt_write(0xc7204, 0xabcd000f); /* panel power up */
gtt_write(0x45400, 0x80000000); /* power well enable */
@@ -231,6 +234,8 @@ static void gma_func0_init(struct device *dev)
int i915lightup(u32 physbase, u32 iobase, u32 mmiobase, u32 gfx);
lightup_ok = i915lightup(physbase, iobase, mmiobase, graphics_base);
+ if (lightup_ok)
+ dev->oprom_is_loaded = 1;
#endif
if (! lightup_ok) {
printk(BIOS_SPEW, "FUI did not run; using VBIOS\n");
@@ -239,6 +244,11 @@ static void gma_func0_init(struct device *dev)
/* Post VBIOS init */
gma_pm_init_post_vbios(dev);
+
+#if CONFIG_CHROMEOS
+ if (dev->oprom_is_loaded)
+ oprom_is_loaded = 1;
+#endif
}
static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c
index 853139e..608ebda 100644
--- a/src/northbridge/intel/sandybridge/gma.c
+++ b/src/northbridge/intel/sandybridge/gma.c
@@ -30,6 +30,11 @@
#include "chip.h"
#include "sandybridge.h"
+#if CONFIG_CHROMEOS
+#include <vendorcode/google/chromeos/chromeos.h>
+int oprom_is_loaded = 0;
+#endif
+
struct gt_powermeter {
u16 reg;
u32 value;
@@ -635,7 +640,6 @@ static void gma_func0_init(struct device *dev)
/* PCI Init, will run VBIOS */
pci_dev_init(dev);
#endif
-
/* Post VBIOS init */
gma_pm_init_post_vbios(dev);
@@ -649,7 +653,13 @@ static void gma_func0_init(struct device *dev)
graphics_base = dev->resource_list[1].base;
int i915lightup(u32 physbase, u32 iobase, u32 mmiobase, u32 gfx);
- i915lightup(physbase, iobase, mmiobase, graphics_base);
+ int lightup_ok = i915lightup(physbase, iobase, mmiobase, graphics_base);
+ if (lightup_ok)
+ dev->oprom_is_loaded = 1;
+#endif
+#if CONFIG_CHROMEOS
+ if (dev->oprom_is_loaded)
+ oprom_is_loaded = 1;
#endif
}
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