[coreboot-gerrit] Patch set updated for coreboot: d7cc030 AMD Hudson/Yangtze: Enable support for SATA port multipliers

Bruce Griffith (Bruce.Griffith@se-eng.com) gerrit at coreboot.org
Fri Aug 2 07:53:10 CEST 2013

Bruce Griffith (Bruce.Griffith at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3808


commit d7cc030684b9957306a893628456196abf39de1d
Author: Bruce Griffith <bruce.griffith at se-eng.com>
Date:   Tue Jul 23 11:50:12 2013 -0600

    AMD Hudson/Yangtze: Enable support for SATA port multipliers
    This patch sets a bit in the Yangtze southbridge to enable
    the extra protocol necessary to handle port multiplier chips.
    This has been turned on during most of Kabini development
    without any notable impact. Olive Hill has an optional daughter
    board that incorporates Silicon Image Steel Vines chips.  This
    change has been tested with and without the daughter board.  This
    change can be regression tested using any Hudson-based motherboard,
    although it has no impact on boards with discreet Hudson/Bolton
    This was tested for impact on SATA performance in the absence of
    a port multiplier using the IOZone benchmarks within the Phoronix
    Test Suite.  A SATA 3 hard drive (6.0 Gbps) and an SSD were
    connected to the ports on Olive Hill without using the port
    multiplier card.  The test results contained more run-to-run
    variation within the same configuration than was seen in the
    aggregate results comparing the interface with and without the
    port multiplier protocol additions.  In other words, the test
    had less accuracy than the impact caused by turning on port
    multiplier support.
    Change-Id: Ie87873b093f3e2a6a5c83b96ccb6c898d3e25f72
    Signed-off-by: Bruce Griffith <bruce.griffith at se-eng.com>
    Reviewed-by: Martin Roth <martin.roth at se-eng.com>
    Reviewed-by: Dave Frodin <dave.frodin at se-eng.com>
 src/southbridge/amd/agesa/hudson/sata.c | 30 +++++++++++++++++++++++++++++-
 1 file changed, 29 insertions(+), 1 deletion(-)

diff --git a/src/southbridge/amd/agesa/hudson/sata.c b/src/southbridge/amd/agesa/hudson/sata.c
index bc1cd92..7499370 100644
--- a/src/southbridge/amd/agesa/hudson/sata.c
+++ b/src/southbridge/amd/agesa/hudson/sata.c
@@ -29,7 +29,35 @@
 static void sata_init(struct device *dev)
+	/**************************************
+	 * Configure the SATA port multiplier *
+	 **************************************/
+	#define BYTE_TO_DWORD_OFFSET(x) (x/4)
+	#define AHCI_BASE_ADDRESS_REG 0x24
+	#define MISC_CONTROL_REG 0x40
+	#define UNLOCK_BIT (1<<0)
+	#define CFG_CAP_SPM (1<<12)
+	volatile u32 *ahci_ptr =
+		(u32*)(pci_read_config32(dev, AHCI_BASE_ADDRESS_REG) & 0xFFFFFF00);
+	u32 temp;
+	/* unlock the write-protect */
+	temp = pci_read_config32(dev, MISC_CONTROL_REG);
+	temp |= UNLOCK_BIT;
+	pci_write_config32(dev, MISC_CONTROL_REG, temp);
+	/* set the SATA AHCI mode to allow port expanders */
+	/* lock the write-protect */
+	temp = pci_read_config32(dev, MISC_CONTROL_REG);
+	temp &= ~UNLOCK_BIT;
+	pci_write_config32(dev, MISC_CONTROL_REG, temp);
 static struct pci_operations lops_pci = {
 	/* .set_subsystem = pci_dev_set_subsystem, */

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