[coreboot-gerrit] Patch set updated for coreboot: bca95c7 exynos5250: ungate the product ID register

[David Hendricks (dhendrix@chromium.org)]

David Hendricks (dhendrix at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3121

-gerrit

commit bca95c71bfa5c3fa606f199b4ae69bb42a492873
Author: David Hendricks <dhendrix at chromium.org>
Date:   Mon Apr 22 16:03:11 2013 -0700

    exynos5250: ungate the product ID register
    
    This makes sure that the product ID (PRO_ID) register can be read
    when the OS kernel is figuring out what kind of CPU it's running on.
    
    For historical reference, the original u-boot code seems to have
    worked basically by accident here. The hardware has a quirk where by
    reading the value before gating the IP block keeps the value
    persistent. That is why the kernel is able to read the product ID
    during the decompression stage. We don't want to rely on that behavior
    when using coreboot, instead the kernel should gate unused IPs.
    
    (credit to Gabe for finding symptom in the kernel)
    
    Change-Id: Iaa21e6e718b9000b5558f568020f393779fd208e
    Signed-off-by: Gabe Black <gabeblack at chromium.org>
    Signed-off-by: David Hendricks <dhendrix at chromium.org>
---
 src/cpu/samsung/exynos5250/clock_init.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/src/cpu/samsung/exynos5250/clock_init.c b/src/cpu/samsung/exynos5250/clock_init.c
index c94cadf..0989b88 100644
--- a/src/cpu/samsung/exynos5250/clock_init.c
+++ b/src/cpu/samsung/exynos5250/clock_init.c
@@ -416,7 +416,12 @@ void clock_gate(void)
 					  CLK_SPI2_MASK |
 					  CLK_SPI0_MASK);
 
-	/* CLK_GATE_IP_PERIS */
+	/*
+	 * CLK_GATE_IP_PERIS
+	 * Note: Keep CHIPID_APBIF ungated to ensure reading the product ID
+	 * register (PRO_ID) works correctly when the OS kernel determines
+	 * which chip it is running on.
+	 */
 	clrbits_le32(&clk->gate_ip_peris, CLK_RTC_MASK |
 					  CLK_TZPC9_MASK |
 					  CLK_TZPC8_MASK |
@@ -427,8 +432,7 @@ void clock_gate(void)
 					  CLK_TZPC3_MASK |
 					  CLK_TZPC2_MASK |
 					  CLK_TZPC1_MASK |
-					  CLK_TZPC0_MASK |
-					  CLK_CHIPID_MASK);
+					  CLK_TZPC0_MASK);
 
 	/* CLK_GATE_BLOCK */
 	clrbits_le32(&clk->gate_block, CLK_ACP_MASK);