[coreboot-gerrit] Patch set updated for coreboot: e6aa14a google/snow: enable 32KHz sleep clock

Ronald G. Minnich (rminnich@gmail.com) gerrit at coreboot.org
Wed Apr 17 06:22:49 CEST 2013

Ronald G. Minnich (rminnich at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3075


commit e6aa14acbf565c58ef5baed582d1e9b929522f9b
Author: David Hendricks <dhendrix at chromium.org>
Date:   Thu Apr 11 12:58:25 2013 -0700

    google/snow: enable 32KHz sleep clock
    Change-Id: I9db91826e4534b8a6eea2b13bcf7c6abd848b4e4
    Signed-off-by: David Hendricks <dhendrix at chromium.org>
 src/mainboard/google/snow/romstage.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c
index 4dce439..41b88e1 100644
--- a/src/mainboard/google/snow/romstage.c
+++ b/src/mainboard/google/snow/romstage.c
@@ -92,6 +92,8 @@ static int setup_pmic(void)
 	error |= max77686_volsetting(PMIC_BUS, PMIC_LDO10, CONFIG_VDD_LDO10_MV,
 						REG_ENABLE, MAX77686_MV);
+	error |= max77686_enable_32khz_cp(PMIC_BUS);
 	if (error)
 		printk(BIOS_CRIT, "%s: Error during PMIC setup\n", __func__);

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