[coreboot-gerrit] New patch to review for coreboot: 5d8295d siemens/sitemp_g1p1: Make ACPI report the right mmconf region

Nico Huber (nico.huber@secunet.com) gerrit at coreboot.org
Tue Apr 9 17:32:55 CEST 2013


Nico Huber (nico.huber at secunet.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3047

-gerrit

commit 5d8295db3d966a7120b4589eb5e5e86e373610db
Author: Patrick Georgi <patrick.georgi at secunet.com>
Date:   Tue Apr 9 15:41:23 2013 +0200

    siemens/sitemp_g1p1: Make ACPI report the right mmconf region
    
    ACPI reported the entire space between top-of-memory and some
    (relatively) arbitrary limit as useful for MMIO. Unfortunately
    the HyperTransport configuration disagreed. Make them match up.
    
    Other boards are not affected since they don't report any region
    for that purpose at all (it seems).
    
    Change-Id: I432a679481fd1c271f14ecd6fe74f0b7a15a698e
    Signed-off-by: Patrick Georgi <patrick.georgi at secunet.com>
---
 src/include/cpu/amd/amdk8_sysconf.h        |  2 ++
 src/mainboard/siemens/sitemp_g1p1/dsdt.asl | 10 +++++-----
 src/northbridge/amd/amdk8/acpi.c           |  4 ++++
 src/northbridge/amd/amdk8/northbridge.c    |  3 +++
 4 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/src/include/cpu/amd/amdk8_sysconf.h b/src/include/cpu/amd/amdk8_sysconf.h
index 3ae35fd..b367ac0 100644
--- a/src/include/cpu/amd/amdk8_sysconf.h
+++ b/src/include/cpu/amd/amdk8_sysconf.h
@@ -21,6 +21,8 @@ struct amdk8_sysconf_t {
 
 	void *mb; // pointer for mb releated struct
 
+	unsigned mmconf_start;
+	unsigned mmconf_end;
 };
 
 extern struct amdk8_sysconf_t sysconf;
diff --git a/src/mainboard/siemens/sitemp_g1p1/dsdt.asl b/src/mainboard/siemens/sitemp_g1p1/dsdt.asl
index 9d64e89..a48a6de 100644
--- a/src/mainboard/siemens/sitemp_g1p1/dsdt.asl
+++ b/src/mainboard/siemens/sitemp_g1p1/dsdt.asl
@@ -255,8 +255,6 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "SIEMENS", "SITEMP ", 0x20101005)
 		MPEN,	8
 	}
 
-	Name (IOLM,0xe0000000)
-
 #include "acpi/platform.asl"
 
 	Scope(\_SB) {
@@ -385,6 +383,8 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "SIEMENS", "SITEMP ", 0x20101005)
 			External (MMIO)
 			External (TOM1)
 			External (TOM2)
+			External (MMCB) /* MMConf Begin */
+			External (MMCE) /* MMConf End */
 
 			Name(_HID, EISAID("PNP0A03"))
 			Name(_ADR, 0x00180000)	/* Dev# = BSP Dev#, Func# = 0 */
@@ -1186,9 +1186,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "SIEMENS", "SITEMP ", 0x20101005)
 				CreateDWordField(CRES, ^EMM2._MAX, EM2E)
 				CreateDWordField(CRES, ^EMM2._LEN, EM2L)
 
-				Store(TOM1, EM2B)
-				Subtract(IOLM, 1, EM2E)
-				Subtract(IOLM, TOM1, EM2L)
+				Store(MMCB, EM2B)
+				Subtract(MMCE, 1, EM2E)
+				Subtract(MMCE, MMCB, EM2L)
 
 				If(LGreater(LOMH, 0xC0000)){
 					Store(0xC0000, EM1B)	/* Hole above C0000 and below E0000 */
diff --git a/src/northbridge/amd/amdk8/acpi.c b/src/northbridge/amd/amdk8/acpi.c
index 2eb39c0..0a6fbba 100644
--- a/src/northbridge/amd/amdk8/acpi.c
+++ b/src/northbridge/amd/amdk8/acpi.c
@@ -280,6 +280,10 @@ int k8acpi_write_vars(void)
 	 */
 	lens += acpigen_write_name_dword("TOM2", (msr.hi << 12) | msr.lo >> 20);
 
+	/* MMConf area for PCI0, begin and end */
+	lens += acpigen_write_name_dword("MMCB", sysconf.mmconf_start);
+	lens += acpigen_write_name_dword("MMCE", sysconf.mmconf_end);
+
 	lens += k8acpi_write_HT();
 	//minus opcode
 	acpigen_patch_len(lens - 1);
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index eaf3a40..0e7df25 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -625,6 +625,9 @@ static void amdk8_set_resources(device_t dev)
 		amdk8_set_resource(dev, mem_highest, nodeid);
 	}
 
+	sysconf.mmconf_start = mem_lowest_start;
+	sysconf.mmconf_end = mem_highest_end;
+
 	compact_resources(dev);
 
 	for(bus = dev->link_list; bus; bus = bus->next) {



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