[coreboot-gerrit] Patch set updated for coreboot: ddeefe5 Add Azalia support for non-AGESA sb700

Denis Carikli (GNUtoo@no-log.org) gerrit at coreboot.org
Mon Apr 8 20:10:54 CEST 2013


Denis Carikli (GNUtoo at no-log.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3035

-gerrit

commit ddeefe51f59d54a7898b29adacc359d663bf00f5
Author: Denis 'GNUtoo' Carikli <GNUtoo at no-log.org>
Date:   Mon Apr 8 19:29:11 2013 +0200

    Add Azalia support for non-AGESA sb700
    
    The code was taken and converted from configureAzaliaSetConfigD4Dword
    in src/vendorcode/amd/cimx/sb700/AZALIA.c
    
    Change-Id: I333b2ebe595aacd9562ad8f4f7f7efab0386619a
    Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo at no-log.org>
---
 src/southbridge/amd/sb700/hda.c | 30 ++++++++++++++++++++++++++++++
 src/southbridge/amd/sb700/hda.h | 31 +++++++++++++++++++++++++++++++
 2 files changed, 61 insertions(+)

diff --git a/src/southbridge/amd/sb700/hda.c b/src/southbridge/amd/sb700/hda.c
index 98cb75f..04ffd1f 100644
--- a/src/southbridge/amd/sb700/hda.c
+++ b/src/southbridge/amd/sb700/hda.c
@@ -24,12 +24,42 @@
 #include <device/pci_ops.h>
 #include <arch/io.h>
 #include <delay.h>
+#include "../../../vendorcode/amd/cimx/sb700/SB700.h"
 #include "sb700.h"
+#include "hda.h"
 
 #define HDA_ICII_REG 0x68
 #define   HDA_ICII_BUSY (1 << 0)
 #define   HDA_ICII_VALID  (1 << 1)
 
+void azalia_set_config(CODECENTRY* tempAzaliaCodecEntryPtr, u32 ddChannelNum, u32 ddBAR0)
+{
+	u8 dbtemp1,dbtemp2, i;
+	u32 ddtemp=0,ddtemp2=0;
+
+	while ((tempAzaliaCodecEntryPtr->Nid) != 0xFF)
+	{
+		dbtemp1=0x20;
+		if ((tempAzaliaCodecEntryPtr->Nid) == 0x1)
+			dbtemp1=0x24;
+		ddtemp =  tempAzaliaCodecEntryPtr->Nid;
+		ddtemp &= 0xff;
+		ddtemp <<= 20;
+		ddtemp |= ddChannelNum;
+		ddtemp |= (0x700 << 8);
+		for(i = 4; i > 0; i-- ){
+			do {
+				ddtemp2 = read32(ddBAR0 + SB_AZ_BAR_REG68);
+			} while (ddtemp2 & 0x1 /* Bit 0 */);
+			dbtemp2 = ( (tempAzaliaCodecEntryPtr->Byte40) >> ((4-i) * 8 ) ) & 0xff;
+			ddtemp = (ddtemp & 0xFFFF0000)+ ((dbtemp1 - i) << 8) + dbtemp2;
+			write32(ddBAR0 + SB_AZ_BAR_REG60 /*, AccWidthUint32 | S3_SAVE, */, ddtemp);
+			udelay(60);
+		}
+		++tempAzaliaCodecEntryPtr;
+	}
+}
+
 static int set_bits(u32 port, u32 mask, u32 val)
 {
 	u32 dword;
diff --git a/src/southbridge/amd/sb700/hda.h b/src/southbridge/amd/sb700/hda.h
new file mode 100644
index 0000000..ed632e7
--- /dev/null
+++ b/src/southbridge/amd/sb700/hda.h
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Denis 'GNUtoo' Carikli <GNUtoo at no-log.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef SB700_HDA_H
+#define SB700_HDA_H
+
+typedef struct _CODECENTRY {
+        u8 Nid;
+        u32 Byte40;
+} CODECENTRY;
+
+void azalia_set_config(CODECENTRY* tempAzaliaCodecEntryPtr, u32 ddChannelNum, u32 ddBAR0);
+
+#endif



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