[coreboot-gerrit] Patch set updated for coreboot: 51d0cc0 Intel: Return on missing microcode file to fix null pointer dereference

Stefan Reinauer (stefan.reinauer@coreboot.org) gerrit at coreboot.org
Fri Apr 5 20:47:42 CEST 2013


Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2990

-gerrit

commit 51d0cc0581f93ef85552b2ce73e8aee1f8d6ba58
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date:   Sat Mar 30 12:04:23 2013 +0100

    Intel: Return on missing microcode file to fix null pointer dereference
    
    Selecting `CPU_MICROCODE_IN_CBFS` in Kconfig but not having the
    microcode blob `cpu_microcode_blob.bin` in CBFS results in a
    null pointer dereference later on resulting in a crash.
    
    for(c = microcode_updates; m->hdrver; m = (const struct microcode *)c) {
    
    Fix this by returning if `microcode_updates` is `NULL`, that means
    no file is found.
    
    This patch is successfully tested on the Lenovo X201.
    
    Change-Id: I6e18fd37256910bf047061e4633a66cf29ad7b69
    Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
    Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
 src/cpu/intel/microcode/microcode.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c
index d908c25..7735e0d 100644
--- a/src/cpu/intel/microcode/microcode.c
+++ b/src/cpu/intel/microcode/microcode.c
@@ -131,7 +131,7 @@ const void *intel_microcode_find(void)
 #endif
 
 	if (!microcode_updates)
-		return microcode_updates;
+		return NULL;
 
 	/* CPUID sets MSR 0x8B iff a microcode update has been loaded. */
 	msr.lo = 0;
@@ -202,6 +202,13 @@ void intel_update_microcode(const void *microcode_updates)
 	const char *c;
 	msr_t msr;
 
+	if (!microcode_updates) {
+#if !defined(__ROMCC__)
+		printk(BIOS_WARNING, "No microcode updates found.\n");
+#endif
+		return;
+	}
+
 	/* CPUID sets MSR 0x8B iff a microcode update has been loaded. */
 	msr.lo = 0;
 	msr.hi = 0;



More information about the coreboot-gerrit mailing list