[coreboot-gerrit] Patch merged into coreboot/master: c6f2722 sandybridge: enable ROM caching

gerrit at coreboot.org gerrit at coreboot.org
Wed Apr 3 19:26:36 CEST 2013

the following patch was just integrated into master:
commit c6f27226a84434182771dbbcd593d223072801f7
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Wed Apr 3 09:56:57 2013 -0500

    sandybridge: enable ROM caching
    If ROM caching is selected the sandybridge chipset code will
    will enable ROM caching after all other CPU threads are brought
    Change-Id: I3a57ba8753678146527ebf9547f5fbbd4f441f43
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: http://review.coreboot.org/3017
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>

Build-Tested: build bot (Jenkins) at Wed Apr  3 18:53:12 2013, giving +1
Reviewed-By: Stefan Reinauer <stefan.reinauer at coreboot.org> at Wed Apr  3 19:26:24 2013, giving +2
See http://review.coreboot.org/3017 for details.


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