the following patch was just integrated into master: commit a6004751a3adba257833e581b20cdafd1f6e5787 Author: Kyösti Mälkki firstname.lastname@example.org Date: Sun Oct 28 11:54:51 2012 +0200
Add APIC memory spaces
To be precise, the base addresses of APICs are actually configurable in either PCI config space or an MSR. For now, this decodes at the commonly used and fixed base address for both IOAPIC and LAPIC.
For LAPIC, Startup-IPI is replaced with INIT IPI to prevent AP CPUs from attempting to execute code from Flash.
Change-Id: Icdbb8cd460bba440b466860f7e92f8a83cdb9d00 Signed-off-by: Kyösti Mälkki email@example.com Reviewed-on: http://review.coreboot.org/1648 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer firstname.lastname@example.org
Build-Tested: build bot (Jenkins) at Sun Oct 28 22:40:57 2012, giving +1 Reviewed-By: Stefan Reinauer email@example.com at Tue Nov 6 22:05:45 2012, giving +2 See http://review.coreboot.org/1648 for details.