Rudolf Marek (r.marek@assembler.cz) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1912
-gerrit
commit 7b391912b225d3d0d657164623a4e14d050533fa Author: Rudolf Marek r.marek@assembler.cz Date: Sun Nov 25 19:55:01 2012 +0100
Add support for extended PCI config space via 0xcf8
Some chipsets allows on request an access to extended PCI config space 0 - 4096. Lets add them to the decoder. There is no generic limitation for number of busses, but this mechanism is used as the backdoor to chipset extended PCI regs.
Change-Id: Ie446104c86916f719bc0230d5e9ce2f8a49cceb1 Signed-off-by: Rudolf Marek r.marek@assembler.cz --- SerialICE/simba/pci_cfg.lua | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/SerialICE/simba/pci_cfg.lua b/SerialICE/simba/pci_cfg.lua index 88ea266..47a061d 100644 --- a/SerialICE/simba/pci_cfg.lua +++ b/SerialICE/simba/pci_cfg.lua @@ -151,7 +151,7 @@ function pci_cfg_print(f, action, bdfr) dir_str = "<=" end
- printk(f, action, "%x:%02x.%x [%02x] %s %s\n", + printk(f, action, "%x:%02x.%x [%03x] %s %s\n", bit32.band(0xff,bit32.rshift(bdfr, 20)), bit32.band(0x1f,bit32.rshift(bdfr, 15)), bit32.band(0x7,bit32.rshift(bdfr, 12)), bit32.band(0xfff,bdfr), dir_str, size_data(action.size, action.data)) @@ -239,8 +239,14 @@ function pci_io_cfg_pre(f, action) new_parent_action() end local bdfr = 0 + -- BDFR is like normal BDF but reg has 12 bits to cover all extended space + -- Copy bus/device/function bdfr = bit32.lshift(action.data, 4) - bdfr = bit32.band(bdfr, 0xfffff000) + bdfr = bit32.band(bdfr, 0x0ffff000) + -- Some chipsets allows (on request) performing extended register space access + -- Usually using bits 27:24, copy that to right place + bdfr = bit32.bor(bdfr, bit32.band(0xf00, bit32.rshift(action.data, 24 - 8))) + -- Add the classic PCI register bdfr = bit32.bor(bdfr, bit32.band(action.data, 0xfc)) pci_cfg_select(f, bdfr) end