Index: Kconfig
===================================================================
--- Kconfig	(revision 105)
+++ Kconfig	(working copy)
@@ -1,3 +1,4 @@
+
 ##
 ## SerialICE
 ##
@@ -88,6 +89,9 @@
 config BOARD_HP_DL165_G6
 	bool "HP DL165 G6"
 
+config BOARD_ASROCK_P4I65GV
+	bool "ASRock P4i65GV"
+
 endchoice
 
 config BOARD_INIT
@@ -110,6 +114,7 @@
  	default "tyan_s2895.c" if BOARD_TYAN_S2895
  	default "tyan_s2912.c" if BOARD_TYAN_S2912
 	default "hp_dl165_g6.c" if BOARD_HP_DL165_G6
+	default "asrock_p4i65gv.c" if BOARD_ASROCK_P4I65GV
 choice
 	prompt "Target communication"
 
Index: mainboard/asrock_p4i65gv.c
===================================================================
--- mainboard/asrock_p4i65gv.c	(revision 0)
+++ mainboard/asrock_p4i65gv.c	(revision 0)
@@ -0,0 +1,60 @@
+/*
+ * SerialICE
+ *
+ * Copyright (C) 2009 coresystems GmbH
+ * Copyright (C) 2010 Idwer Vollering <vidwer@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+const char boardname[33] = "ASRock P4i65GV                  ";
+
+#define SUPERIO_CONFIG_PORT 0x2e
+
+static void mainboard_set_ich5(void)
+{
+	/* COMB = 0x2f8, COMA = 0x3f8 */
+	pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xe0), 0x10);
+
+	/* CNF1, KBC, COMB, COMA */
+	pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0xe6), 0x1403);
+
+	/* 512KB flash */
+	pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xe3), 0x80);
+	pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xf0), 0x0);
+
+	/* Disable USB, AC97, IDE/SATA  */
+	pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0xf2), 0x8f66);
+}
+
+static void superio_init(void)
+{
+	pnp_enter_ext_func_mode(SUPERIO_CONFIG_PORT);
+
+	pnp_write_register(SUPERIO_CONFIG_PORT, 0x24, 0xc4);
+
+	pnp_set_logical_device(SUPERIO_CONFIG_PORT, 2);
+	pnp_set_enable(SUPERIO_CONFIG_PORT, 0);
+	pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8);
+	pnp_set_irq0(SUPERIO_CONFIG_PORT, 4);
+	pnp_set_enable(SUPERIO_CONFIG_PORT, 1);
+
+	pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT);
+}
+
+static void chipset_init(void)
+{
+	mainboard_set_ich5();
+	superio_init();
+}