Index: chipset.c
===================================================================
--- chipset.c	(revision 97)
+++ chipset.c	(working copy)
@@ -64,6 +64,12 @@
 	pnp_write_register(port, 0x61, iobase & 0xff);
 }
 
+static inline void pnp_set_iobase1(u16 port, u16 iobase)
+{
+	pnp_write_register(port, 0x62, (iobase >> 8) & 0xff);
+	pnp_write_register(port, 0x63, iobase & 0xff);
+}
+
 static inline void pnp_set_irq0(u16 port, u8 irq)
 {
 	pnp_write_register(port, 0x70, irq);
Index: Kconfig
===================================================================
--- Kconfig	(revision 97)
+++ Kconfig	(working copy)
@@ -67,6 +67,9 @@
 	bool "Tyan S2912"
 	select MCP55_ROMSTRAP
 
+config BOARD_HP_DL165_G6
+	bool "HP DL165 G6"
+
 endchoice
 
 config BOARD_INIT
@@ -83,6 +86,7 @@
 	default "asrock_939a785gmh.c" if BOARD_ASROCK_939A785GMH
 	default "televideo_tc7010.c" if BOARD_TELEVIDEO_TC7010
  	default "tyan_s2912.c" if BOARD_TYAN_S2912
+	default "hp_dl165_g6.c" if BOARD_HP_DL165_G6
 choice
 	prompt "Target communication"
 
Index: mainboard/hp_dl165_g6.c
===================================================================
--- mainboard/hp_dl165_g6.c	(revision 0)
+++ mainboard/hp_dl165_g6.c	(revision 0)
@@ -0,0 +1,60 @@
+/*
+ * SerialICE 
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ * Copyright (C) 2010 Arne Georg Gleditsch <arne.gleditsch@numascale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+const char boardname[33]="HP DL165 G6                     ";
+
+#define SCH4307_CONFIG_PORT	0x162e
+#define SUPERIO_CONFIG_PORT	0x2e
+#define SUPERIO_SP1             2
+
+static void superio_init(void)
+{
+	int i;
+
+	pnp_enter_ext_func_mode_alt(SCH4307_CONFIG_PORT);
+	pnp_set_logical_device(SCH4307_CONFIG_PORT, 6); /* CMOS/RTC */
+	pnp_set_iobase0(SCH4307_CONFIG_PORT, 0x70);
+	pnp_set_iobase1(SCH4307_CONFIG_PORT, 0x72);
+	pnp_set_enable(SCH4307_CONFIG_PORT, 3);
+
+	pnp_set_logical_device(SCH4307_CONFIG_PORT, 3); /* Debug */
+	pnp_set_iobase0(SCH4307_CONFIG_PORT, 0x80);
+	pnp_set_enable(SCH4307_CONFIG_PORT, 1);
+
+	pnp_set_logical_device(SCH4307_CONFIG_PORT, 0xa);
+	pnp_set_iobase0(SCH4307_CONFIG_PORT, 0x600);
+	pnp_set_enable(SCH4307_CONFIG_PORT, 1);
+	pnp_exit_ext_func_mode(SCH4307_CONFIG_PORT);
+
+	/* Enable the serial port. */
+        outb(0x5a, SUPERIO_CONFIG_PORT);
+	pnp_set_logical_device(SUPERIO_CONFIG_PORT, SUPERIO_SP1); /* COM1 */
+	pnp_set_enable(SUPERIO_CONFIG_PORT, 0);
+	pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8);
+	pnp_set_irq0(SUPERIO_CONFIG_PORT, 4);
+	pnp_set_enable(SUPERIO_CONFIG_PORT, 1);
+        outb(0xa5, SUPERIO_CONFIG_PORT);
+}
+
+static void chipset_init(void)
+{
+	superio_init();
+}