/*
 * SerialICE 
 *
 * Copyright (C) 2011 Joseph Smith <joe@settoplinux.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 */

/* This is a chipset init file for the ITOX G5M100 mainboard */
 
const char boardname[33]="ITOX G5M100                     ";

/* Hardware specific functions */

static void southbridge_init(void)
{
	/* Communication Port Decode Ranges */
	pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xe0), 0x10);
	/* Enables Decoding */
	pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0xe6), 0x300f);

	/* FWH Decode Enable */
	pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xe3), 0xc0);
	pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xf0), 0x0f);
}

static void superio_init(void)
{
	pnp_enter_ext_func_mode(0x2e);

	/* Set CLKSEL=1 to select 48 MHz (otherwise serial won't work). */
	pnp_write_register(0x2e, 0x24, 0xc0);

	pnp_set_logical_device(0x2e, 2); /* COM1 */
	pnp_set_enable(0x2e, 0);
	pnp_set_iobase0(0x2e, 0x3f8);
	pnp_set_irq0(0x2e, 4);
	pnp_set_enable(0x2e, 1);

	pnp_set_logical_device(0x2e, 3); /* COM2 */
	pnp_set_enable(0x2e, 0);
	pnp_set_iobase0(0x2e, 0x2f8);
	pnp_set_irq0(0x2e, 3);
	pnp_set_enable(0x2e, 1);

	pnp_exit_ext_func_mode(0x2e);
}

static void chipset_init(void)
{
	southbridge_init();
	superio_init();
}