[PATCH 1/2] optionroms: Drop support for CONFIG_OPTIONROMS_DEPLOYED

[Kevin O'Connor]

No modern software uses this option and it complicates the code.

Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net>
---
 src/Kconfig      |  8 --------
 src/fw/shadow.c  | 15 +-------------
 src/optionroms.c | 61 ++++++++++++++++++++------------------------------------
 3 files changed, 23 insertions(+), 61 deletions(-)

diff --git a/src/Kconfig b/src/Kconfig
index de39b38..e767be1 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -395,14 +395,6 @@ menu "BIOS interfaces"
         default y
         help
             Support finding and running option roms during POST.
-    config OPTIONROMS_DEPLOYED
-        depends on OPTIONROMS && QEMU
-        bool "Option roms are already at 0xc0000-0xf0000"
-        default n
-        help
-            Select this if option ROMs are already copied to
-            0xc0000-0xf0000.  This must only be selected when using
-            Bochs or QEMU versions older than 0.12.
     config PMM
         depends on OPTIONROMS
         bool "PMM interface"
diff --git a/src/fw/shadow.c b/src/fw/shadow.c
index bdb5c5b..f766bb5 100644
--- a/src/fw/shadow.c
+++ b/src/fw/shadow.c
@@ -26,24 +26,11 @@ static void
 __make_bios_writable_intel(u16 bdf, u32 pam0)
 {
     // Make ram from 0xc0000-0xf0000 writable
-    int clear = 0;
     int i;
     for (i=0; i<6; i++) {
         u32 pam = pam0 + 1 + i;
-        int reg = pci_config_readb(bdf, pam);
-        if (CONFIG_OPTIONROMS_DEPLOYED && (reg & 0x11) != 0x11) {
-            // Need to copy optionroms to work around qemu implementation
-            void *mem = (void*)(BUILD_ROM_START + i * 32*1024);
-            memcpy((void*)BUILD_BIOS_TMP_ADDR, mem, 32*1024);
-            pci_config_writeb(bdf, pam, 0x33);
-            memcpy(mem, (void*)BUILD_BIOS_TMP_ADDR, 32*1024);
-            clear = 1;
-        } else {
-            pci_config_writeb(bdf, pam, 0x33);
-        }
+        pci_config_writeb(bdf, pam, 0x33);
     }
-    if (clear)
-        memset((void*)BUILD_BIOS_TMP_ADDR, 0, 32*1024);
 
     // Make ram from 0xf0000-0x100000 writable
     int reg = pci_config_readb(bdf, pam0);
diff --git a/src/optionroms.c b/src/optionroms.c
index 9897753..65f7fe0 100644
--- a/src/optionroms.c
+++ b/src/optionroms.c
@@ -347,28 +347,16 @@ optionrom_setup(void)
     memset(sources, 0, sizeof(sources));
     u32 post_vga = rom_get_last();
 
-    if (CONFIG_OPTIONROMS_DEPLOYED) {
-        // Option roms are already deployed on the system.
-        u32 pos = post_vga;
-        while (pos < rom_get_max()) {
-            int ret = init_optionrom((void*)pos, 0, 0);
-            if (ret)
-                pos += OPTION_ROM_ALIGN;
-            else
-                pos = rom_get_last();
-        }
-    } else {
-        // Find and deploy PCI roms.
-        struct pci_device *pci;
-        foreachpci(pci) {
-            if (pci->class == PCI_CLASS_DISPLAY_VGA || pci->have_driver)
-                continue;
-            init_pcirom(pci, 0, sources);
-        }
-
-        // Find and deploy CBFS roms not associated with a device.
-        run_file_roms("genroms/", 0, sources);
+    // Find and deploy PCI roms.
+    struct pci_device *pci;
+    foreachpci(pci) {
+        if (pci->class == PCI_CLASS_DISPLAY_VGA || pci->have_driver)
+            continue;
+        init_pcirom(pci, 0, sources);
     }
+
+    // Find and deploy CBFS roms not associated with a device.
+    run_file_roms("genroms/", 0, sources);
     rom_reserve(0);
 
     // All option roms found and deployed - now build BEV/BCV vectors.
@@ -427,26 +415,21 @@ vgarom_setup(void)
     RunPCIroms = romfile_loadint("etc/pci-optionrom-exec", 2);
     ScreenAndDebug = romfile_loadint("etc/screen-and-debug", 1);
 
-    if (CONFIG_OPTIONROMS_DEPLOYED) {
-        // Option roms are already deployed on the system.
-        init_optionrom((void*)BUILD_ROM_START, 0, 1);
-    } else {
-        // Clear option rom memory
-        memset((void*)BUILD_ROM_START, 0, rom_get_max() - BUILD_ROM_START);
-
-        // Find and deploy PCI VGA rom.
-        struct pci_device *pci;
-        foreachpci(pci) {
-            if (!is_pci_vga(pci))
-                continue;
-            vgahook_setup(pci);
-            init_pcirom(pci, 1, NULL);
-            break;
-        }
+    // Clear option rom memory
+    memset((void*)BUILD_ROM_START, 0, rom_get_max() - BUILD_ROM_START);
 
-        // Find and deploy CBFS vga-style roms not associated with a device.
-        run_file_roms("vgaroms/", 1, NULL);
+    // Find and deploy PCI VGA rom.
+    struct pci_device *pci;
+    foreachpci(pci) {
+        if (!is_pci_vga(pci))
+            continue;
+        vgahook_setup(pci);
+        init_pcirom(pci, 1, NULL);
+        break;
     }
+
+    // Find and deploy CBFS vga-style roms not associated with a device.
+    run_file_roms("vgaroms/", 1, NULL);
     rom_reserve(0);
 
     if (rom_get_last() == BUILD_ROM_START)
-- 
2.5.5

[PATCH 2/2] shadow: Batch PCI config writes

[Kevin O'Connor]

Enabling and disabling shadow ram on QEMU is slow.  Batch the PCI
writes to reduce the number of memory changes QEMU must implement.

Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net>
---
 src/fw/shadow.c | 55 ++++++++++++++++++++++++++++++++++++++-----------------
 1 file changed, 38 insertions(+), 17 deletions(-)

diff --git a/src/fw/shadow.c b/src/fw/shadow.c
index f766bb5..cd02d3a 100644
--- a/src/fw/shadow.c
+++ b/src/fw/shadow.c
@@ -21,27 +21,39 @@
 // On the emulators, the bios at 0xf0000 is also at 0xffff0000
 #define BIOS_SRC_OFFSET 0xfff00000
 
+union pamdata_u {
+    u8 data8[8];
+    u32 data32[2];
+};
+
 // Enable shadowing and copy bios.
 static void
 __make_bios_writable_intel(u16 bdf, u32 pam0)
 {
+    // Read in current PAM settings from pci config space
+    union pamdata_u pamdata;
+    pamdata.data32[0] = pci_config_readl(bdf, ALIGN_DOWN(pam0, 4));
+    pamdata.data32[1] = pci_config_readl(bdf, ALIGN_DOWN(pam0, 4) + 4);
+    u8 *pam = &pamdata.data8[pam0 & 0x03];
+
     // Make ram from 0xc0000-0xf0000 writable
     int i;
-    for (i=0; i<6; i++) {
-        u32 pam = pam0 + 1 + i;
-        pci_config_writeb(bdf, pam, 0x33);
-    }
+    for (i=0; i<6; i++)
+        pam[i + 1] = 0x33;
 
     // Make ram from 0xf0000-0x100000 writable
-    int reg = pci_config_readb(bdf, pam0);
-    pci_config_writeb(bdf, pam0, 0x30);
-    if (reg & 0x10)
-        // Ram already present.
-        return;
-
-    // Copy bios.
-    memcpy(VSYMBOL(code32flat_start), VSYMBOL(code32flat_start) + BIOS_SRC_OFFSET
-           , SYMBOL(code32flat_end) - SYMBOL(code32flat_start));
+    int ram_present = pam[0] & 0x10;
+    pam[0] = 0x30;
+
+    // Write PAM settings back to pci config space
+    pci_config_writel(bdf, ALIGN_DOWN(pam0, 4), pamdata.data32[0]);
+    pci_config_writel(bdf, ALIGN_DOWN(pam0, 4) + 4, pamdata.data32[1]);
+
+    if (!ram_present)
+        // Copy bios.
+        memcpy(VSYMBOL(code32flat_start)
+               , VSYMBOL(code32flat_start) + BIOS_SRC_OFFSET
+               , SYMBOL(code32flat_end) - SYMBOL(code32flat_start));
 }
 
 static void
@@ -68,6 +80,12 @@ make_bios_readonly_intel(u16 bdf, u32 pam0)
     // Flush any pending writes before locking memory.
     wbinvd();
 
+    // Read in current PAM settings from pci config space
+    union pamdata_u pamdata;
+    pamdata.data32[0] = pci_config_readl(bdf, ALIGN_DOWN(pam0, 4));
+    pamdata.data32[1] = pci_config_readl(bdf, ALIGN_DOWN(pam0, 4) + 4);
+    u8 *pam = &pamdata.data8[pam0 & 0x03];
+
     // Write protect roms from 0xc0000-0xf0000
     u32 romlast = BUILD_BIOS_ADDR, rommax = BUILD_BIOS_ADDR;
     if (CONFIG_WRITABLE_UPPERMEMORY)
@@ -77,17 +95,20 @@ make_bios_readonly_intel(u16 bdf, u32 pam0)
     int i;
     for (i=0; i<6; i++) {
         u32 mem = BUILD_ROM_START + i * 32*1024;
-        u32 pam = pam0 + 1 + i;
         if (romlast < mem + 16*1024 || rommax < mem + 32*1024) {
             if (romlast >= mem && rommax >= mem + 16*1024)
-                pci_config_writeb(bdf, pam, 0x31);
+                pam[i + 1] = 0x31;
             break;
         }
-        pci_config_writeb(bdf, pam, 0x11);
+        pam[i + 1] = 0x11;
     }
 
     // Write protect 0xf0000-0x100000
-    pci_config_writeb(bdf, pam0, 0x10);
+    pam[0] = 0x10;
+
+    // Write PAM settings back to pci config space
+    pci_config_writel(bdf, ALIGN_DOWN(pam0, 4), pamdata.data32[0]);
+    pci_config_writel(bdf, ALIGN_DOWN(pam0, 4) + 4, pamdata.data32[1]);
 }
 
 static int ShadowBDF = -1;
-- 
2.5.5

[PATCH 2/2] shadow: Batch PCI config writes

[Kevin O'Connor]

On Tue, Apr 05, 2016 at 12:51:56PM -0400, Kevin O'Connor wrote:
  Enabling and disabling shadow ram on QEMU is slow. 
Batch the PCI
 writes to reduce the number of memory changes QEMU must implement.
FYI, I committed this change.

-Kevin