Re: [SeaBIOS] [gPXE] [PATCH] [pciextra] Restore the PCI COMMAND register after writing to the BARs

[Stefan Hajnoczi]

Hi Kevin,
I think you might have some insight from SeaBIOS into this issue.

Bernhard reports that under KVM PCI device passthrough it is necessary
to save the contents of PCI_COMMAND and restore it after sizing a PCI
BAR.  Otherwise PCI config space seems to contain junk after BAR
sizing.  gPXE currently has this code change applied, but I don't
think it is the root cause of this issue:

http://git.etherboot.org/?p=gpxe.git;a=blob;f=src/drivers/bus/pciextra.c;h=7...

Note that gPXE is not disabling memory decode in PCI_COMMAND during
BAR sizing (and Linux doesn't either AFAIK).  I'm surprised that
restoring an unchanged PCI_COMMAND would have any effect at all.

When gPXE is built to do Type 1 accesses
(gpxe/src/arch/x86/include/gpxe/pcidirect.h) instead of PCI BIOS then
this issue does not appear.

Any idea what is happening?

Full email thread here:
http://etherboot.org/pipermail/gpxe/2010-January/000287.html

Stefan