Looking for coreboot table at 0 1048576 bytes.
Mapping 1MB of physical memory at 0x0 (requested 0x0).
Found!
  coreboot table entry 0x11
    Found forwarding entry.
Unmapping 1MB of virtual memory at 0x7fb0d53c1000.
Looking for coreboot table at bff3c000 1048576 bytes.
Mapping 1MB of physical memory at 0xbff3c000 (requested 0xbff3c000).
Found!
  coreboot table entry 0xc8
  coreboot table entry 0xcc
  coreboot table entry 0x01
    Found memory map.
      LB_MEM_TABLE found.
      LB_MEM_TABLE found.
  coreboot table entry 0x03
  coreboot table entry 0x04
  coreboot table entry 0x05
  coreboot table entry 0x06
  coreboot table entry 0x07
  coreboot table entry 0x26
  coreboot table entry 0x29
  coreboot table entry 0x17
    Found cbmem console.
      cbmem_addr = bffde000
  coreboot table entry 0x24
  coreboot table entry 0x30
  coreboot table entry 0x32
  coreboot table entry 0x31
  coreboot table entry 0x31
  coreboot table entry 0x31
  coreboot table entry 0x31
  coreboot table entry 0x31
  coreboot table entry 0x31
  coreboot table entry 0x31
  coreboot table entry 0x31
  coreboot table entry 0x31
  coreboot table entry 0x31
  coreboot table entry 0x31
  coreboot table entry 0x31
  coreboot table entry 0x31
  coreboot table entry 0x31
Unmapping 1MB of virtual memory at 0x7fb0d53c1000.
Mapping 8B of physical memory at 0xbffde000 (requested 0xbffde000).
Unmapping 0MB of virtual memory at 0x7fb0d54f0000.
Mapping 78790B of physical memory at 0xbffde000 (requested 0xbffde000).
*** Pre-CBMEM romstage console overflowed, log truncated! ***
arting SandyBridge RAM training (1).
Trying CAS 9, tCK 384.
Found compatible clock, CAS pair.
Selected DRAM frequency: 666 MHz
Selected CAS latency   : 9T
PLL busy... done in 60 us
MCU frequency is set at : 666 MHz
Done dimm mapping
Update PCI-E configuration space:
PCI(0, 0, 0)[a0] = 0
PCI(0, 0, 0)[a4] = 4
PCI(0, 0, 0)[bc] = c2a00000
PCI(0, 0, 0)[a8] = 3b600000
PCI(0, 0, 0)[ac] = 4
PCI(0, 0, 0)[b8] = c0000000
PCI(0, 0, 0)[b0] = c0a00000
PCI(0, 0, 0)[b4] = c0800000
PCI(0, 0, 0)[7c] = 7f
PCI(0, 0, 0)[70] = fe000000
PCI(0, 0, 0)[74] = 3
PCI(0, 0, 0)[78] = fe000c00
Done memory map
Done io registers
t123: 1912, 9120, 500
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : NO
ME: Manufacturing Mode      : NO
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Recovery
ME: Current Operation State : Bring up
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : BUP Phase
ME: Power Management Event  : Clean Moff->Mx wake
ME: Progress Phase State    : 0x4e
ME: FWS2: 0x104e0002
ME:  Bist in progress: 0x0
ME:  ICC Status      : 0x1
ME:  Invoke MEBx     : 0x0
ME:  CPU replaced    : 0x0
ME:  MBP ready       : 0x0
ME:  MFS failure     : 0x0
ME:  Warm reset req  : 0x0
ME:  CPU repl valid  : 0x0
ME:  (Reserved)      : 0x0
ME:  FW update req   : 0x0
ME:  (Reserved)      : 0x0
ME:  Current state   : 0x4e
ME:  Current PM event: 0x0
ME:  Progress code   : 0x1
Waited long enough, or CPU was not replaced, continue...
PASSED! Tell ME that DRAM is ready
ME: FWS2: 0x102c0002
ME:  Bist in progress: 0x0
ME:  ICC Status      : 0x1
ME:  Invoke MEBx     : 0x0
ME:  CPU replaced    : 0x0
ME:  MBP ready       : 0x0
ME:  MFS failure     : 0x0
ME:  Warm reset req  : 0x0
ME:  CPU repl valid  : 0x0
ME:  (Reserved)      : 0x0
ME:  FW update req   : 0x0
ME:  (Reserved)      : 0x0
ME:  Current state   : 0x2c
ME:  Current PM event: 0x0
ME:  Progress code   : 0x1
ME: Requested BIOS Action: Continue to boot
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : NO
ME: Manufacturing Mode      : NO
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Recovery
ME: Current Operation State : Bring up
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : BUP Phase
ME: Power Management Event  : Clean Moff->Mx wake
ME: Progress Phase State    : 0x2c
memcfg DDR3 ref clock 133 MHz
memcfg DDR3 clock 1330 MHz
memcfg channel assignment: A: 0, B  1, C  2
memcfg channel[0] config (00620020):
   ECC inactive
   enhanced interleave mode on
   rank interleave on
   DIMMA 8192 MB width x8 dual rank, selected
   DIMMB 0 MB width x8 single rank
memcfg channel[1] config (00620020):
   ECC inactive
   enhanced interleave mode on
   rank interleave on
   DIMMA 8192 MB width x8 dual rank, selected
   DIMMB 0 MB width x8 single rank
CBMEM:
IMD: root @ bffff000 254 entries.
IMD: root @ bfffec00 62 entries.
CBMEM entry for DIMM info: 0xbfffe960
POST: 0x3b
POST: 0x3c
POST: 0x3d
TPM initialization.
TPM: Init
Found TPM ST33ZP24 by ST Microelectronics
TPM: Open
TPM: Startup
TPM: command 0x99 returned 0x0
TPM: OK.
POST: 0x3f
MTRR Range: Start=ff800000 End=0 (Size 800000)
MTRR Range: Start=0 End=1000000 (Size 1000000)
MTRR Range: Start=bf800000 End=c0000000 (Size 800000)
MTRR Range: Start=c0000000 End=c0800000 (Size 800000)
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 2ff00 size 1688e
Decompressing stage fallback/ramstage @ 0xbff96fc0 (268464 bytes)
Loading module at bff97000 with entry bff97000. filesize: 0x2ff10 memsize: 0x41870
Processing 3129 relocs. Offset value of 0xbfe97000


coreboot-4.6-1402-g0b80bd1 Sun Sep 10 17:49:27 UTC 2017 ramstage starting...
POST: 0x39
POST: 0x80
Normal boot.
POST: 0x70
BS: BS_PRE_DEVICE times (us): entry 0 run 3 exit 0
POST: 0x71
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 4 exit 0
POST: 0x72
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
PCI: 00:16.0: enabled 0
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 1
PCI: 00:1c.4: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 1
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 1
PNP: 0c31.0: enabled 1
PNP: 00ff.2: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
I2C: 00:5c: enabled 1
I2C: 00:5d: enabled 1
I2C: 00:5e: enabled 1
I2C: 00:5f: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 1
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
  APIC: acac: enabled 0
 DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:01.0: enabled 0
  PCI: 00:02.0: enabled 1
  PCI: 00:16.0: enabled 0
  PCI: 00:16.1: enabled 0
  PCI: 00:16.2: enabled 0
  PCI: 00:16.3: enabled 0
  PCI: 00:19.0: enabled 1
  PCI: 00:1a.0: enabled 1
  PCI: 00:1b.0: enabled 1
  PCI: 00:1c.0: enabled 1
  PCI: 00:1c.1: enabled 1
  PCI: 00:1c.2: enabled 1
  PCI: 00:1c.3: enabled 1
  PCI: 00:1c.4: enabled 1
   PCI: 00:00.0: enabled 1
  PCI: 00:1c.5: enabled 0
  PCI: 00:1c.6: enabled 1
  PCI: 00:1c.7: enabled 0
  PCI: 00:1d.0: enabled 1
  PCI: 00:1e.0: enabled 0
  PCI: 00:1f.0: enabled 1
   PNP: 00ff.1: enabled 1
   PNP: 0c31.0: enabled 1
   PNP: 00ff.2: enabled 1
  PCI: 00:1f.2: enabled 1
  PCI: 00:1f.3: enabled 1
   I2C: 00:54: enabled 1
   I2C: 00:55: enabled 1
   I2C: 00:56: enabled 1
   I2C: 00:57: enabled 1
   I2C: 00:5c: enabled 1
   I2C: 00:5d: enabled 1
   I2C: 00:5e: enabled 1
   I2C: 00:5f: enabled 1
  PCI: 00:1f.5: enabled 0
  PCI: 00:1f.6: enabled 1
Root Device scanning...
root_dev_scan_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:00.0 [8086/0104] ops
PCI: 00:00.0 [8086/0104] enabled
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
PCI: 00:01.0 subordinate bus PCI Express
PCI: 00:01.0 [8086/0101] disabled
PCI: 00:02.0 [8086/0000] ops
PCI: 00:02.0 [8086/0126] enabled
PCI: 00:04.0 [8086/0103] enabled
PCI: 00:16.0: Disabling device
PCI: 00:16.0 [8086/1c3a] ops
PCI: 00:16.0 [8086/1c3a] disabled
PCI: 00:16.1: Disabling device
PCI: 00:16.2: Disabling device
PCI: 00:16.3: Disabling device
PCI: 00:19.0 [8086/1502] enabled
PCI: 00:1a.0 [8086/0000] ops
PCI: 00:1a.0 [8086/1c2d] enabled
PCI: 00:1b.0 [8086/0000] ops
PCI: 00:1b.0 [8086/1c20] enabled
PCH: PCIe Root Port coalescing is enabled
PCI: 00:1c.0 [8086/0000] bus ops
PCI: 00:1c.0 [8086/1c10] enabled
PCI: 00:1c.1 [8086/0000] bus ops
PCI: 00:1c.1 [8086/1c12] enabled
PCI: Static device PCI: 00:1c.2 not found, disabling it.
PCI: 00:1c.3 [8086/0000] bus ops
PCI: 00:1c.3 [8086/1c16] enabled
PCI: 00:1c.4 [8086/0000] bus ops
PCI: 00:1c.4 [8086/1c18] enabled
PCI: 00:1c.5: Disabling device
PCH: Remap PCIe function 6 to 5
PCI: 00:1c.6 [8086/0000] bus ops
PCI: 00:1c.6 [8086/1c1c] enabled
PCI: 00:1c.7: Disabling device
PCH: RPFN 0x76543210 -> 0xf5e43210
PCH: PCIe map 1c.5 -> 1c.6
PCH: PCIe map 1c.6 -> 1c.5
PCI: 00:1d.0 [8086/0000] ops
PCI: 00:1d.0 [8086/1c26] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/1c4f] enabled
PCI: 00:1f.2 [8086/0000] ops
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 19c00 size 7fc
PCI: 00:1f.2 [8086/1c01] enabled
PCI: 00:1f.3 [8086/0000] bus ops
PCI: 00:1f.3 [8086/1c22] enabled
PCI: 00:1f.5: Disabling device
PCI: Static device PCI: 00:1f.6 not found, disabling it.
POST: 0x25
PCI: 00:1c.0 scanning...
do_pci_scan_bridge for PCI: 00:1c.0
PCI: pci_scan_bus for bus 01
POST: 0x24
POST: 0x25
POST: 0x55
scan_bus: scanning of bus PCI: 00:1c.0 took 53 usecs
PCI: 00:1c.1 scanning...
do_pci_scan_bridge for PCI: 00:1c.1
PCI: pci_scan_bus for bus 02
POST: 0x24
PCI: 02:00.0 [8086/0000] ops
PCI: 02:00.0 [8086/4238] enabled
POST: 0x25
POST: 0x55
Capability: type 0x01 @ 0xc8
Capability: type 0x05 @ 0xd0
Capability: type 0x10 @ 0xe0
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
scan_bus: scanning of bus PCI: 00:1c.1 took 228 usecs
PCI: 00:1c.3 scanning...
do_pci_scan_bridge for PCI: 00:1c.3
PCI: pci_scan_bus for bus 03
POST: 0x24
PCI: 03:00.0 [1033/0194] enabled
POST: 0x25
POST: 0x55
Capability: type 0x01 @ 0x50
Capability: type 0x05 @ 0x70
Capability: type 0x11 @ 0x90
Capability: type 0x10 @ 0xa0
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
scan_bus: scanning of bus PCI: 00:1c.3 took 217 usecs
PCI: 00:1c.4 scanning...
do_pci_scan_bridge for PCI: 00:1c.4
PCI: pci_scan_bus for bus 04
POST: 0x24
PCI: 04:00.0 [1180/0000] ops
PCI: 04:00.0 [1180/e823] enabled
POST: 0x25
POST: 0x55
Capability: type 0x05 @ 0x50
Capability: type 0x01 @ 0x78
Capability: type 0x10 @ 0x80
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
scan_bus: scanning of bus PCI: 00:1c.4 took 233 usecs
PCI: 00:1c.5 scanning...
do_pci_scan_bridge for PCI: 00:1c.5
PCI: pci_scan_bus for bus 05
POST: 0x24
PCI: 05:00.0 [1033/0194] enabled
POST: 0x25
POST: 0x55
Capability: type 0x01 @ 0x50
Capability: type 0x05 @ 0x70
Capability: type 0x11 @ 0x90
Capability: type 0x10 @ 0xa0
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
scan_bus: scanning of bus PCI: 00:1c.5 took 216 usecs
PCI: 00:1f.0 scanning...
scan_lpc_bus for PCI: 00:1f.0
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 19c00 size 7fc
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 19c00 size 7fc
PNP: 00ff.1 enabled
PNP: 0c31.0 enabled
recv_ec_data: 0x38
recv_ec_data: 0x44
recv_ec_data: 0x48
recv_ec_data: 0x54
recv_ec_data: 0x33
recv_ec_data: 0x34
recv_ec_data: 0x57
recv_ec_data: 0x57
recv_ec_data: 0x14
recv_ec_data: 0x03
recv_ec_data: 0x40
recv_ec_data: 0x12
EC Firmware ID 8DHT34WW-3.20, Version 4.01C
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 19c00 size 7fc
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 19c00 size 7fc
WARNING: No CMOS option 'low_battery_beep'.
recv_ec_data: 0x00
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 19c00 size 7fc
recv_ec_data: 0x00
recv_ec_data: 0x10
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 19c00 size 7fc
H8: BDC detection not implemented. Assuming BDC installed
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 19c00 size 7fc
recv_ec_data: 0x20
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 19c00 size 7fc
recv_ec_data: 0x30
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 19c00 size 7fc
recv_ec_data: 0x00
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 19c00 size 7fc
recv_ec_data: 0xa6
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 19c00 size 7fc
recv_ec_data: 0xa6
recv_ec_data: 0x70
PNP: 00ff.2 enabled
scan_lpc_bus for PCI: 00:1f.0 done
scan_bus: scanning of bus PCI: 00:1f.0 took 5667 usecs
PCI: 00:1f.3 scanning...
scan_generic_bus for PCI: 00:1f.3
bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled
scan_generic_bus for PCI: 00:1f.3 done
scan_bus: scanning of bus PCI: 00:1f.3 took 31 usecs
POST: 0x55
scan_bus: scanning of bus DOMAIN: 0000 took 7045 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 7055 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 7222 exit 0
POST: 0x73
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
PCI: 00:1c.0 read_resources bus 1 link: 0
PCI: 00:1c.0 read_resources bus 1 link: 0 done
PCI: 00:1c.1 read_resources bus 2 link: 0
PCI: 00:1c.1 read_resources bus 2 link: 0 done
PCI: 00:1c.3 read_resources bus 3 link: 0
PCI: 00:1c.3 read_resources bus 3 link: 0 done
PCI: 00:1c.4 read_resources bus 4 link: 0
PCI: 00:1c.4 read_resources bus 4 link: 0 done
PCI: 00:1c.5 read_resources bus 5 link: 0
PCI: 00:1c.5 read_resources bus 5 link: 0 done
PCI: 00:1f.0 read_resources bus 0 link: 0
PNP: 00ff.1 missing read_resources
PNP: 00ff.2 missing read_resources
PCI: 00:1f.0 read_resources bus 0 link: 0 done
PCI: 00:1f.3 read_resources bus 1 link: 0
PCI: 00:1f.3 read_resources bus 1 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: acac
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
   PCI: 00:01.0
   PCI: 00:02.0
   PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
   PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
   PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
   PCI: 00:04.0
   PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
   PCI: 00:16.0
   PCI: 00:16.1
   PCI: 00:16.2
   PCI: 00:16.3
   PCI: 00:19.0
   PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
   PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
   PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
   PCI: 00:1a.0
   PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1c.0
   PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:1c.1 child on link 0 PCI: 02:00.0
   PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 02:00.0
    PCI: 02:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1c.2
   PCI: 00:1c.3 child on link 0 PCI: 03:00.0
   PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 03:00.0
    PCI: 03:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
Unknown device path type: 0
    
Unknown device path type: 0
     resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10
Unknown device path type: 0
     resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14
Unknown device path type: 0
     resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18
   PCI: 00:1c.4 child on link 0 PCI: 04:00.0
   PCI: 00:1c.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.4 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 04:00.0
    PCI: 04:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
   PCI: 00:1c.6
   PCI: 00:1c.5 child on link 0 PCI: 05:00.0
   PCI: 00:1c.5 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.5 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.5 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 05:00.0
    PCI: 05:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1c.7
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1e.0
   PCI: 00:1f.0 child on link 0 PNP: 00ff.1
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
   PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200
   PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300
    PNP: 00ff.1
    PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
    PNP: 0c31.0
    PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0
    PNP: 00ff.2
    PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
    PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
    PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
   PCI: 00:1f.3 child on link 0 I2C: 01:54
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
   PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
    I2C: 01:54
    I2C: 01:55
    I2C: 01:56
    I2C: 01:57
    I2C: 01:5c
    I2C: 01:5d
    I2C: 01:5e
    I2C: 01:5f
   PCI: 00:1f.5
   PCI: 00:1f.6
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
Unknown device path type: 0
 18 *  [0x0 - 0xfff] io
PCI: 00:1c.3 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.5 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.5 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.3 1c *  [0x0 - 0xfff] io
PCI: 00:02.0 20 *  [0x1000 - 0x103f] io
PCI: 00:19.0 18 *  [0x1040 - 0x105f] io
PCI: 00:1f.2 20 *  [0x1060 - 0x107f] io
PCI: 00:1f.2 10 *  [0x1080 - 0x1087] io
PCI: 00:1f.2 18 *  [0x1088 - 0x108f] io
PCI: 00:1f.2 14 *  [0x1090 - 0x1093] io
PCI: 00:1f.2 1c *  [0x1094 - 0x1097] io
DOMAIN: 0000 io: base: 1098 size: 1098 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:00.0 10 *  [0x0 - 0x1fff] mem
PCI: 00:1c.1 mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
Unknown device path type: 0
 14 *  [0x0 - 0x7fffff] prefmem
PCI: 00:1c.3 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
Unknown device path type: 0
 10 *  [0x0 - 0x7fffff] mem
PCI: 03:00.0 10 *  [0x800000 - 0x801fff] mem
PCI: 00:1c.3 mem: base: 802000 size: 900000 align: 22 gran: 20 limit: ffffffff done
PCI: 00:1c.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 04:00.0 10 *  [0x0 - 0xff] mem
PCI: 00:1c.4 mem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.5 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.5 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.5 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 05:00.0 10 *  [0x0 - 0x1fff] mem
PCI: 00:1c.5 mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
PCI: 00:1c.3 20 *  [0x10000000 - 0x108fffff] mem
PCI: 00:1c.3 24 *  [0x10c00000 - 0x113fffff] prefmem
PCI: 00:02.0 10 *  [0x11400000 - 0x117fffff] mem
PCI: 00:1c.1 20 *  [0x11800000 - 0x118fffff] mem
PCI: 00:1c.4 20 *  [0x11900000 - 0x119fffff] mem
PCI: 00:1c.5 20 *  [0x11a00000 - 0x11afffff] mem
PCI: 00:19.0 10 *  [0x11b00000 - 0x11b1ffff] mem
PCI: 00:04.0 10 *  [0x11b20000 - 0x11b27fff] mem
PCI: 00:1b.0 10 *  [0x11b28000 - 0x11b2bfff] mem
PCI: 00:19.0 14 *  [0x11b2c000 - 0x11b2cfff] mem
PCI: 00:1f.2 24 *  [0x11b2d000 - 0x11b2d7ff] mem
PCI: 00:1a.0 10 *  [0x11b2e000 - 0x11b2e3ff] mem
PCI: 00:1d.0 10 *  [0x11b2f000 - 0x11b2f3ff] mem
PCI: 00:1f.3 10 *  [0x11b30000 - 0x11b300ff] mem
DOMAIN: 0000 mem: base: 11b30100 size: 11b30100 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:00.0 60 base f8000000 limit fbffffff mem (fixed)
constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed)
skipping PNP: 00ff.2@60 fixed resource, size=0!
skipping PNP: 00ff.2@62 fixed resource, size=0!
skipping PNP: 00ff.2@64 fixed resource, size=0!
skipping PNP: 00ff.2@66 fixed resource, size=0!
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 0000167c limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff
Setting resources...
DOMAIN: 0000 io: base:167c size:1098 align:12 gran:0 limit:ffff
PCI: 00:1c.3 1c *  [0x2000 - 0x2fff] io
PCI: 00:02.0 20 *  [0x3000 - 0x303f] io
PCI: 00:19.0 18 *  [0x3040 - 0x305f] io
PCI: 00:1f.2 20 *  [0x3060 - 0x307f] io
PCI: 00:1f.2 10 *  [0x3080 - 0x3087] io
PCI: 00:1f.2 18 *  [0x3088 - 0x308f] io
PCI: 00:1f.2 14 *  [0x3090 - 0x3093] io
PCI: 00:1f.2 1c *  [0x3094 - 0x3097] io
DOMAIN: 0000 io: next_base: 3098 size: 1098 align: 12 gran: 0 done
PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.3 io: base:2000 size:1000 align:12 gran:12 limit:2fff
Unknown device path type: 0
 18 *  [0x2000 - 0x2fff] io
PCI: 00:1c.3 io: next_base: 3000 size: 1000 align: 12 gran: 12 done
PCI: 00:1c.4 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.4 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.5 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.5 io: next_base: ffff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:e0000000 size:11b30100 align:28 gran:0 limit:f7ffffff
PCI: 00:02.0 18 *  [0xe0000000 - 0xefffffff] prefmem
PCI: 00:1c.3 20 *  [0xf0000000 - 0xf08fffff] mem
PCI: 00:1c.3 24 *  [0xf0c00000 - 0xf13fffff] prefmem
PCI: 00:02.0 10 *  [0xf1400000 - 0xf17fffff] mem
PCI: 00:1c.1 20 *  [0xf1800000 - 0xf18fffff] mem
PCI: 00:1c.4 20 *  [0xf1900000 - 0xf19fffff] mem
PCI: 00:1c.5 20 *  [0xf1a00000 - 0xf1afffff] mem
PCI: 00:19.0 10 *  [0xf1b00000 - 0xf1b1ffff] mem
PCI: 00:04.0 10 *  [0xf1b20000 - 0xf1b27fff] mem
PCI: 00:1b.0 10 *  [0xf1b28000 - 0xf1b2bfff] mem
PCI: 00:19.0 14 *  [0xf1b2c000 - 0xf1b2cfff] mem
PCI: 00:1f.2 24 *  [0xf1b2d000 - 0xf1b2d7ff] mem
PCI: 00:1a.0 10 *  [0xf1b2e000 - 0xf1b2e3ff] mem
PCI: 00:1d.0 10 *  [0xf1b2f000 - 0xf1b2f3ff] mem
PCI: 00:1f.3 10 *  [0xf1b30000 - 0xf1b300ff] mem
DOMAIN: 0000 mem: next_base: f1b30100 size: 11b30100 align: 28 gran: 0 done
PCI: 00:1c.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.0 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.1 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.1 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.1 mem: base:f1800000 size:100000 align:20 gran:20 limit:f18fffff
PCI: 02:00.0 10 *  [0xf1800000 - 0xf1801fff] mem
PCI: 00:1c.1 mem: next_base: f1802000 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.3 prefmem: base:f0c00000 size:800000 align:22 gran:20 limit:f13fffff
Unknown device path type: 0
 14 *  [0xf0c00000 - 0xf13fffff] prefmem
PCI: 00:1c.3 prefmem: next_base: f1400000 size: 800000 align: 22 gran: 20 done
PCI: 00:1c.3 mem: base:f0000000 size:900000 align:22 gran:20 limit:f08fffff
Unknown device path type: 0
 10 *  [0xf0000000 - 0xf07fffff] mem
PCI: 03:00.0 10 *  [0xf0800000 - 0xf0801fff] mem
PCI: 00:1c.3 mem: next_base: f0802000 size: 900000 align: 22 gran: 20 done
PCI: 00:1c.4 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.4 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.4 mem: base:f1900000 size:100000 align:20 gran:20 limit:f19fffff
PCI: 04:00.0 10 *  [0xf1900000 - 0xf19000ff] mem
PCI: 00:1c.4 mem: next_base: f1900100 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.5 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.5 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.5 mem: base:f1a00000 size:100000 align:20 gran:20 limit:f1afffff
PCI: 05:00.0 10 *  [0xf1a00000 - 0xf1a01fff] mem
PCI: 00:1c.5 mem: next_base: f1a02000 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
TOUUD 0x43b600000 TOLUD 0xc2a00000 TOM 0x400000000
MEBASE 0x3fe000000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0xc0000000 size 8M
Available memory below 4GB: 3072M
Available memory above 4GB: 13238M
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:02.0 10 <- [0x00f1400000 - 0x00f17fffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io
PCI: 00:04.0 10 <- [0x00f1b20000 - 0x00f1b27fff] size 0x00008000 gran 0x0f mem64
PCI: 00:19.0 10 <- [0x00f1b00000 - 0x00f1b1ffff] size 0x00020000 gran 0x11 mem
PCI: 00:19.0 14 <- [0x00f1b2c000 - 0x00f1b2cfff] size 0x00001000 gran 0x0c mem
PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io
PCI: 00:1a.0 10 <- [0x00f1b2e000 - 0x00f1b2e3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x00f1b28000 - 0x00f1b2bfff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:1c.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:1c.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1c.1 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1c.1 20 <- [0x00f1800000 - 0x00f18fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:1c.1 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x00f1800000 - 0x00f1801fff] size 0x00002000 gran 0x0d mem64
PCI: 00:1c.1 assign_resources, bus 2 link: 0
PCI: 00:1c.3 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io
PCI: 00:1c.3 24 <- [0x00f0c00000 - 0x00f13fffff] size 0x00800000 gran 0x14 bus 03 prefmem
PCI: 00:1c.3 20 <- [0x00f0000000 - 0x00f08fffff] size 0x00900000 gran 0x14 bus 03 mem
PCI: 00:1c.3 assign_resources, bus 3 link: 0
PCI: 03:00.0 10 <- [0x00f0800000 - 0x00f0801fff] size 0x00002000 gran 0x0d mem64
Unknown device path type: 0
 missing set_resources
PCI: 00:1c.3 assign_resources, bus 3 link: 0
PCI: 00:1c.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io
PCI: 00:1c.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 00:1c.4 20 <- [0x00f1900000 - 0x00f19fffff] size 0x00100000 gran 0x14 bus 04 mem
PCI: 00:1c.4 assign_resources, bus 4 link: 0
PCI: 04:00.0 10 <- [0x00f1900000 - 0x00f19000ff] size 0x00000100 gran 0x08 mem
PCI: 00:1c.4 assign_resources, bus 4 link: 0
PCI: 00:1c.5 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io
PCI: 00:1c.5 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 05 prefmem
PCI: 00:1c.5 20 <- [0x00f1a00000 - 0x00f1afffff] size 0x00100000 gran 0x14 bus 05 mem
PCI: 00:1c.5 assign_resources, bus 5 link: 0
PCI: 05:00.0 10 <- [0x00f1a00000 - 0x00f1a01fff] size 0x00002000 gran 0x0d mem64
PCI: 00:1c.5 assign_resources, bus 5 link: 0
PCI: 00:1d.0 10 <- [0x00f1b2f000 - 0x00f1b2f3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PNP: 00ff.1 missing set_resources
PNP: 00ff.2 missing set_resources
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00f1b2d000 - 0x00f1b2d7ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x00f1b30000 - 0x00f1b300ff] size 0x00000100 gran 0x08 mem64
PCI: 00:1f.3 assign_resources, bus 1 link: 0
PCI: 00:1f.3 assign_resources, bus 1 link: 0
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: acac
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 167c size 1098 align 12 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base e0000000 size 11b30100 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
  DOMAIN: 0000 resource base 100000 size bff00000 align 0 gran 0 limit 0 flags e0004200 index 4
  DOMAIN: 0000 resource base 100000000 size 33b600000 align 0 gran 0 limit 0 flags e0004200 index 5
  DOMAIN: 0000 resource base c0000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6
  DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
  DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8
  DOMAIN: 0000 resource base 20000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index 9
  DOMAIN: 0000 resource base 40000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index a
  DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
  DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
   PCI: 00:00.0
   PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
   PCI: 00:01.0
   PCI: 00:02.0
   PCI: 00:02.0 resource base f1400000 size 400000 align 22 gran 22 limit f17fffff flags 60000201 index 10
   PCI: 00:02.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18
   PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20
   PCI: 00:04.0
   PCI: 00:04.0 resource base f1b20000 size 8000 align 15 gran 15 limit f1b27fff flags 60000201 index 10
   PCI: 00:16.0
   PCI: 00:16.1
   PCI: 00:16.2
   PCI: 00:16.3
   PCI: 00:19.0
   PCI: 00:19.0 resource base f1b00000 size 20000 align 17 gran 17 limit f1b1ffff flags 60000200 index 10
   PCI: 00:19.0 resource base f1b2c000 size 1000 align 12 gran 12 limit f1b2cfff flags 60000200 index 14
   PCI: 00:19.0 resource base 3040 size 20 align 5 gran 5 limit 305f flags 60000100 index 18
   PCI: 00:1a.0
   PCI: 00:1a.0 resource base f1b2e000 size 400 align 12 gran 10 limit f1b2e3ff flags 60000200 index 10
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base f1b28000 size 4000 align 14 gran 14 limit f1b2bfff flags 60000201 index 10
   PCI: 00:1c.0
   PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
   PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
   PCI: 00:1c.1 child on link 0 PCI: 02:00.0
   PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
   PCI: 00:1c.1 resource base f1800000 size 100000 align 20 gran 20 limit f18fffff flags 60080202 index 20
    PCI: 02:00.0
    PCI: 02:00.0 resource base f1800000 size 2000 align 13 gran 13 limit f1801fff flags 60000201 index 10
   PCI: 00:1c.2
   PCI: 00:1c.3 child on link 0 PCI: 03:00.0
   PCI: 00:1c.3 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
   PCI: 00:1c.3 resource base f0c00000 size 800000 align 22 gran 20 limit f13fffff flags 60081202 index 24
   PCI: 00:1c.3 resource base f0000000 size 900000 align 22 gran 20 limit f08fffff flags 60080202 index 20
    PCI: 03:00.0
    PCI: 03:00.0 resource base f0800000 size 2000 align 13 gran 13 limit f0801fff flags 60000201 index 10
Unknown device path type: 0
    
Unknown device path type: 0
     resource base f0000000 size 800000 align 22 gran 22 limit f07fffff flags 40000200 index 10
Unknown device path type: 0
     resource base f0c00000 size 800000 align 22 gran 22 limit f13fffff flags 40001200 index 14
Unknown device path type: 0
     resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 40000100 index 18
   PCI: 00:1c.4 child on link 0 PCI: 04:00.0
   PCI: 00:1c.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
   PCI: 00:1c.4 resource base f1900000 size 100000 align 20 gran 20 limit f19fffff flags 60080202 index 20
    PCI: 04:00.0
    PCI: 04:00.0 resource base f1900000 size 100 align 12 gran 8 limit f19000ff flags 60000200 index 10
   PCI: 00:1c.6
   PCI: 00:1c.5 child on link 0 PCI: 05:00.0
   PCI: 00:1c.5 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.5 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
   PCI: 00:1c.5 resource base f1a00000 size 100000 align 20 gran 20 limit f1afffff flags 60080202 index 20
    PCI: 05:00.0
    PCI: 05:00.0 resource base f1a00000 size 2000 align 13 gran 13 limit f1a01fff flags 60000201 index 10
   PCI: 00:1c.7
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base f1b2f000 size 400 align 12 gran 10 limit f1b2f3ff flags 60000200 index 10
   PCI: 00:1e.0
   PCI: 00:1f.0 child on link 0 PNP: 00ff.1
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
   PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200
   PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300
    PNP: 00ff.1
    PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
    PNP: 0c31.0
    PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0
    PNP: 00ff.2
    PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
    PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
    PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
    PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 3080 size 8 align 3 gran 3 limit 3087 flags 60000100 index 10
   PCI: 00:1f.2 resource base 3090 size 4 align 2 gran 2 limit 3093 flags 60000100 index 14
   PCI: 00:1f.2 resource base 3088 size 8 align 3 gran 3 limit 308f flags 60000100 index 18
   PCI: 00:1f.2 resource base 3094 size 4 align 2 gran 2 limit 3097 flags 60000100 index 1c
   PCI: 00:1f.2 resource base 3060 size 20 align 5 gran 5 limit 307f flags 60000100 index 20
   PCI: 00:1f.2 resource base f1b2d000 size 800 align 12 gran 11 limit f1b2d7ff flags 60000200 index 24
   PCI: 00:1f.3 child on link 0 I2C: 01:54
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
   PCI: 00:1f.3 resource base f1b30000 size 100 align 12 gran 8 limit f1b300ff flags 60000201 index 10
    I2C: 01:54
    I2C: 01:55
    I2C: 01:56
    I2C: 01:57
    I2C: 01:5c
    I2C: 01:5d
    I2C: 01:5e
    I2C: 01:5f
   PCI: 00:1f.5
   PCI: 00:1f.6
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 3435 exit 0
POST: 0x74
Enabling resources...
PCI: 00:00.0 subsystem <- 17aa/21db
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 17aa/21db
PCI: 00:02.0 cmd <- 03
PCI: 00:04.0 cmd <- 02
PCI: 00:19.0 subsystem <- 17aa/21ce
PCI: 00:19.0 cmd <- 103
PCI: 00:1a.0 subsystem <- 17aa/21db
PCI: 00:1a.0 cmd <- 102
PCI: 00:1b.0 subsystem <- 17aa/21db
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 subsystem <- 17aa/21db
PCI: 00:1c.0 cmd <- 100
PCI: 00:1c.1 bridge ctrl <- 0003
PCI: 00:1c.1 subsystem <- 17aa/21db
PCI: 00:1c.1 cmd <- 106
PCI: 00:1c.3 bridge ctrl <- 0003
PCI: 00:1c.3 subsystem <- 17aa/21db
PCI: 00:1c.3 cmd <- 107
PCI: 00:1c.4 bridge ctrl <- 0003
PCI: 00:1c.4 subsystem <- 17aa/21db
PCI: 00:1c.4 cmd <- 106
PCI: 00:1c.5 bridge ctrl <- 0003
PCI: 00:1c.5 subsystem <- 17aa/21db
PCI: 00:1c.5 cmd <- 106
PCI: 00:1d.0 subsystem <- 17aa/21db
PCI: 00:1d.0 cmd <- 102
pch_decode_init
PCI: 00:1f.0 subsystem <- 17aa/21db
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 17aa/21db
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 17aa/21db
PCI: 00:1f.3 cmd <- 103
PCI: 02:00.0 cmd <- 02
PCI: 03:00.0 cmd <- 02
PCI: 04:00.0 subsystem <- 17aa/21fa
PCI: 04:00.0 cmd <- 06
PCI: 05:00.0 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 206 exit 0
POST: 0x75
Initializing devices...
Root Device init ...
Root Device init finished in 1 usecs
POST: 0x75
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Setting up SMI for CPU
Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
Processing 12 relocs. Offset value of 0x00038000
Adjusting 00038002: 0x00000024 -> 0x00038024
Adjusting 0003801d: 0x0000003c -> 0x0003803c
Adjusting 00038026: 0x00000024 -> 0x00038024
Adjusting 00038054: 0x00000120 -> 0x00038120
Adjusting 00038066: 0x000001a8 -> 0x000381a8
Adjusting 0003806f: 0x00000100 -> 0x00038100
Adjusting 00038077: 0x00000104 -> 0x00038104
Adjusting 00038081: 0x00000110 -> 0x00038110
Adjusting 0003808a: 0x00000114 -> 0x00038114
Adjusting 000380ab: 0x00000118 -> 0x00038118
Adjusting 000380b2: 0x0000010c -> 0x0003810c
Adjusting 000380b8: 0x00000108 -> 0x00038108
SMM Module: stub loaded at 00038000. Will call bffb1161(bffd47e0)
Installing SMM handler to 0xc0000000
Loading module at c0010000 with entry c0010554. filesize: 0x1918 memsize: 0x5938
Processing 78 relocs. Offset value of 0xc0010000
Adjusting c0010036: 0x00001814 -> 0xc0011814
Adjusting c0010055: 0x00001814 -> 0xc0011814
Adjusting c0010108: 0x00001814 -> 0xc0011814
Adjusting c001019d: 0x00001824 -> 0xc0011824
Adjusting c00104cb: 0x00001918 -> 0xc0011918
Adjusting c0010521: 0x00001910 -> 0xc0011910
Adjusting c0010537: 0x00001880 -> 0xc0011880
Adjusting c001055d: 0x00001918 -> 0xc0011918
Adjusting c001056b: 0x00001918 -> 0xc0011918
Adjusting c0010578: 0x00001900 -> 0xc0011900
Adjusting c0010583: 0x00001900 -> 0xc0011900
Adjusting c0010597: 0x00001904 -> 0xc0011904
Adjusting c001059d: 0x0000191c -> 0xc001191c
Adjusting c00105a5: 0x00001904 -> 0xc0011904
Adjusting c00105c2: 0x0000191c -> 0xc001191c
Adjusting c00105cb: 0x00001900 -> 0xc0011900
Adjusting c00106b1: 0x00001920 -> 0xc0011920
Adjusting c00106c1: 0x00001920 -> 0xc0011920
Adjusting c00106e7: 0x00001920 -> 0xc0011920
Adjusting c001074f: 0x00001844 -> 0xc0011844
Adjusting c001084e: 0x0000190c -> 0xc001190c
Adjusting c0010877: 0x0000190c -> 0xc001190c
Adjusting c001089a: 0x0000190c -> 0xc001190c
Adjusting c00108c3: 0x00001908 -> 0xc0011908
Adjusting c00108e1: 0x0000190c -> 0xc001190c
Adjusting c0010907: 0x00001908 -> 0xc0011908
Adjusting c00109c3: 0x0000190c -> 0xc001190c
Adjusting c00109c8: 0x00001908 -> 0xc0011908
Adjusting c00109d1: 0x00001854 -> 0xc0011854
Adjusting c0010a4f: 0x00001800 -> 0xc0011800
Adjusting c0010d4b: 0x00001924 -> 0xc0011924
Adjusting c0010d7a: 0x00001928 -> 0xc0011928
Adjusting c0010d8d: 0x00001924 -> 0xc0011924
Adjusting c0010db0: 0x00001928 -> 0xc0011928
Adjusting c0010e73: 0x00001924 -> 0xc0011924
Adjusting c00110ab: 0x00001928 -> 0xc0011928
Adjusting c00112b2: 0x00001928 -> 0xc0011928
Adjusting c0011391: 0x00001910 -> 0xc0011910
Adjusting c00113a1: 0x00001910 -> 0xc0011910
Adjusting c00113b6: 0x00001910 -> 0xc0011910
Adjusting c00113d7: 0x00001910 -> 0xc0011910
Adjusting c0011404: 0x00001910 -> 0xc0011910
Adjusting c0011424: 0x00001910 -> 0xc0011910
Adjusting c001143a: 0x00001934 -> 0xc0011934
Adjusting c0011488: 0x00001934 -> 0xc0011934
Adjusting c001148e: 0x00001930 -> 0xc0011930
Adjusting c0011496: 0x0000192c -> 0xc001192c
Adjusting c00114b3: 0x0000192c -> 0xc001192c
Adjusting c00114ce: 0x00001910 -> 0xc0011910
Adjusting c0011524: 0x00001930 -> 0xc0011930
Adjusting c0011579: 0x00001862 -> 0xc0011862
Adjusting c0011596: 0x00001910 -> 0xc0011910
Adjusting c00115b5: 0x00001878 -> 0xc0011878
Adjusting c00115ba: 0x00001930 -> 0xc0011930
Adjusting c001167f: 0x00001910 -> 0xc0011910
Adjusting c00116ad: 0x00001910 -> 0xc0011910
Adjusting c00116da: 0x00001910 -> 0xc0011910
Adjusting c0011700: 0x00001910 -> 0xc0011910
Adjusting c0011724: 0x00001910 -> 0xc0011910
Adjusting c00117b8: 0x00001930 -> 0xc0011930
Adjusting c00117cc: 0x00001910 -> 0xc0011910
Adjusting c00117f8: 0x000017e0 -> 0xc00117e0
Adjusting c0011800: 0x00000021 -> 0xc0010021
Adjusting c0011804: 0x000017e0 -> 0xc00117e0
Adjusting c001180c: 0x00000092 -> 0xc0010092
Adjusting c0011818: 0x00001830 -> 0xc0011830
Adjusting c0011830: 0x000002d5 -> 0xc00102d5
Adjusting c0011834: 0x000002e1 -> 0xc00102e1
Adjusting c0011838: 0x000002e4 -> 0xc00102e4
Adjusting c0011890: 0x00001561 -> 0xc0011561
Adjusting c0011894: 0x000013e7 -> 0xc00113e7
Adjusting c00118a0: 0x000016d7 -> 0xc00116d7
Adjusting c00118a4: 0x0000138e -> 0xc001138e
Adjusting c00118a8: 0x000013af -> 0xc00113af
Adjusting c00118ac: 0x000013aa -> 0xc00113aa
Adjusting c00118b4: 0x000014cb -> 0xc00114cb
Adjusting c00118b8: 0x0000139e -> 0xc001139e
Adjusting c00118d4: 0x0000150f -> 0xc001150f
Loading module at c0008000 with entry c0008000. filesize: 0x1a8 memsize: 0x1a8
Processing 12 relocs. Offset value of 0xc0008000
Adjusting c0008002: 0x00000024 -> 0xc0008024
Adjusting c000801d: 0x0000003c -> 0xc000803c
Adjusting c0008026: 0x00000024 -> 0xc0008024
Adjusting c0008054: 0x00000120 -> 0xc0008120
Adjusting c0008066: 0x000001a8 -> 0xc00081a8
Adjusting c000806f: 0x00000100 -> 0xc0008100
Adjusting c0008077: 0x00000104 -> 0xc0008104
Adjusting c0008081: 0x00000110 -> 0xc0008110
Adjusting c000808a: 0x00000114 -> 0xc0008114
Adjusting c00080ab: 0x00000118 -> 0xc0008118
Adjusting c00080b2: 0x0000010c -> 0xc000810c
Adjusting c00080b8: 0x00000108 -> 0xc0008108
SMM Module: placing jmp sequence at c0007c00 rel16 0x03fd
SMM Module: placing jmp sequence at c0007800 rel16 0x07fd
SMM Module: placing jmp sequence at c0007400 rel16 0x0bfd
SMM Module: stub loaded at c0008000. Will call c0010554(00000000)
Initializing southbridge SMI... ... pmbase = 0x0500

SMI_STS: MCSMI GPI PM1 
PM1_STS: WAK PWRBTN 
GPE0_STS: GPIO14 GPIO11 GPIO9 GPIO7 GPIO6 GPIO5 GPIO3 GPIO1 GPIO0 
ALT_GP_SMI_STS: GPI14 GPI11 GPI9 GPI7 GPI6 GPI5 GPI3 GPI1 GPI0 
TCO_STS: 
  ... raise SMI#
In relocation handler: cpu 0
New SMBASE=0xc0000000 IEDBASE=0xc0400000 @ 0003fc00
Writing SMRR. base = 0xc0000006, mask=0xff800800
Relocation complete.
Locking SMM.
Initializing CPU #0
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
POST: 0x60
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13d00 size 5800
microcode: sig=0x206a7 pf=0x10 revision=0x29
CPU: Intel(R) Core(TM) i7-2640M CPU @ 2.80GHz.
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x00000000c0000000 size 0xbff40000 type 6
0x00000000c0000000 - 0x00000000e0000000 size 0x20000000 type 0
0x00000000e0000000 - 0x00000000f0000000 size 0x10000000 type 1
0x00000000f0000000 - 0x0000000100000000 size 0x10000000 type 0
0x0000000100000000 - 0x000000043b600000 size 0x33b600000 type 6
MTRR addr 0x0-0x10 set to 6 type @ 0
MTRR addr 0x10-0x20 set to 6 type @ 1
MTRR addr 0x20-0x30 set to 6 type @ 2
MTRR addr 0x30-0x40 set to 6 type @ 3
MTRR addr 0x40-0x50 set to 6 type @ 4
MTRR addr 0x50-0x60 set to 6 type @ 5
MTRR addr 0x60-0x70 set to 6 type @ 6
MTRR addr 0x70-0x80 set to 6 type @ 7
MTRR addr 0x80-0x84 set to 6 type @ 8
MTRR addr 0x84-0x88 set to 6 type @ 9
MTRR addr 0x88-0x8c set to 6 type @ 10
MTRR addr 0x8c-0x90 set to 6 type @ 11
MTRR addr 0x90-0x94 set to 6 type @ 12
MTRR addr 0x94-0x98 set to 6 type @ 13
MTRR addr 0x98-0x9c set to 6 type @ 14
MTRR addr 0x9c-0xa0 set to 6 type @ 15
MTRR addr 0xa0-0xa4 set to 0 type @ 16
MTRR addr 0xa4-0xa8 set to 0 type @ 17
MTRR addr 0xa8-0xac set to 0 type @ 18
MTRR addr 0xac-0xb0 set to 0 type @ 19
MTRR addr 0xb0-0xb4 set to 0 type @ 20
MTRR addr 0xb4-0xb8 set to 0 type @ 21
MTRR addr 0xb8-0xbc set to 0 type @ 22
MTRR addr 0xbc-0xc0 set to 0 type @ 23
MTRR addr 0xc0-0xc1 set to 6 type @ 24
MTRR addr 0xc1-0xc2 set to 6 type @ 25
MTRR addr 0xc2-0xc3 set to 6 type @ 26
MTRR addr 0xc3-0xc4 set to 6 type @ 27
MTRR addr 0xc4-0xc5 set to 6 type @ 28
MTRR addr 0xc5-0xc6 set to 6 type @ 29
MTRR addr 0xc6-0xc7 set to 6 type @ 30
MTRR addr 0xc7-0xc8 set to 6 type @ 31
MTRR addr 0xc8-0xc9 set to 6 type @ 32
MTRR addr 0xc9-0xca set to 6 type @ 33
MTRR addr 0xca-0xcb set to 6 type @ 34
MTRR addr 0xcb-0xcc set to 6 type @ 35
MTRR addr 0xcc-0xcd set to 6 type @ 36
MTRR addr 0xcd-0xce set to 6 type @ 37
MTRR addr 0xce-0xcf set to 6 type @ 38
MTRR addr 0xcf-0xd0 set to 6 type @ 39
MTRR addr 0xd0-0xd1 set to 6 type @ 40
MTRR addr 0xd1-0xd2 set to 6 type @ 41
MTRR addr 0xd2-0xd3 set to 6 type @ 42
MTRR addr 0xd3-0xd4 set to 6 type @ 43
MTRR addr 0xd4-0xd5 set to 6 type @ 44
MTRR addr 0xd5-0xd6 set to 6 type @ 45
MTRR addr 0xd6-0xd7 set to 6 type @ 46
MTRR addr 0xd7-0xd8 set to 6 type @ 47
MTRR addr 0xd8-0xd9 set to 6 type @ 48
MTRR addr 0xd9-0xda set to 6 type @ 49
MTRR addr 0xda-0xdb set to 6 type @ 50
MTRR addr 0xdb-0xdc set to 6 type @ 51
MTRR addr 0xdc-0xdd set to 6 type @ 52
MTRR addr 0xdd-0xde set to 6 type @ 53
MTRR addr 0xde-0xdf set to 6 type @ 54
MTRR addr 0xdf-0xe0 set to 6 type @ 55
MTRR addr 0xe0-0xe1 set to 6 type @ 56
MTRR addr 0xe1-0xe2 set to 6 type @ 57
MTRR addr 0xe2-0xe3 set to 6 type @ 58
MTRR addr 0xe3-0xe4 set to 6 type @ 59
MTRR addr 0xe4-0xe5 set to 6 type @ 60
MTRR addr 0xe5-0xe6 set to 6 type @ 61
MTRR addr 0xe6-0xe7 set to 6 type @ 62
MTRR addr 0xe7-0xe8 set to 6 type @ 63
MTRR addr 0xe8-0xe9 set to 6 type @ 64
MTRR addr 0xe9-0xea set to 6 type @ 65
MTRR addr 0xea-0xeb set to 6 type @ 66
MTRR addr 0xeb-0xec set to 6 type @ 67
MTRR addr 0xec-0xed set to 6 type @ 68
MTRR addr 0xed-0xee set to 6 type @ 69
MTRR addr 0xee-0xef set to 6 type @ 70
MTRR addr 0xef-0xf0 set to 6 type @ 71
MTRR addr 0xf0-0xf1 set to 6 type @ 72
MTRR addr 0xf1-0xf2 set to 6 type @ 73
MTRR addr 0xf2-0xf3 set to 6 type @ 74
MTRR addr 0xf3-0xf4 set to 6 type @ 75
MTRR addr 0xf4-0xf5 set to 6 type @ 76
MTRR addr 0xf5-0xf6 set to 6 type @ 77
MTRR addr 0xf6-0xf7 set to 6 type @ 78
MTRR addr 0xf7-0xf8 set to 6 type @ 79
MTRR addr 0xf8-0xf9 set to 6 type @ 80
MTRR addr 0xf9-0xfa set to 6 type @ 81
MTRR addr 0xfa-0xfb set to 6 type @ 82
MTRR addr 0xfb-0xfc set to 6 type @ 83
MTRR addr 0xfc-0xfd set to 6 type @ 84
MTRR addr 0xfd-0xfe set to 6 type @ 85
MTRR addr 0xfe-0xff set to 6 type @ 86
MTRR addr 0xff-0x100 set to 6 type @ 87
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 3/11.
MTRR: WB selected as default type.
MTRR: 0 base 0x00000000c0000000 mask 0x0000000fe0000000 type 0
MTRR: 1 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1
MTRR: 2 base 0x00000000f0000000 mask 0x0000000ff0000000 type 0

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Setting up local APIC... apic_id: 0x00 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2800
Turbo is available but hidden
Turbo has been enabled
CPU: 0 has 2 cores, 2 threads per core
CPU: 0 has core 1
CPU1: stack_base bffcd000, stack_end bffcdff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
In relocation handler: cpu 1
New SMBASE=0xbffffc00 IEDBASE=0xc0400000 @ 0003fc00
Writing SMRR. base = 0xc0000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
CPU: 0 has core 2
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
POST: 0x60
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13d00 size 5800
microcode: sig=0x206a7 pf=0x10 revision=0x29
CPU: Intel(R) Core(TM) i7-2640M CPU @ 2.80GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Setting up local APIC... apic_id: 0x01 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2800
CPU #1 initialized
CPU2: stack_base bffcc000, stack_end bffccff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 2.
After apic_write.
In relocation handler: cpu 2
Startup point 1.
Waiting for send to finish...
+New SMBASE=0xbffff800 IEDBASE=0xc0400000 @ 0003fc00
Sending STARTUP #2 to 2.
After apic_write.
Writing SMRR. base = 0xc0000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU: 0 has core 3
Initializing CPU #2
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
POST: 0x60
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13d00 size 5800
microcode: sig=0x206a7 pf=0x10 revision=0x0
microcode: updated to revision 0x29 date=2013-06-12
CPU: Intel(R) Core(TM) i7-2640M CPU @ 2.80GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Setting up local APIC... apic_id: 0x02 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2800
CPU #2 initialized
CPU3: stack_base bffcb000, stack_end bffcbff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 3.
After apic_write.
In relocation handler: cpu 3
New SMBASE=0xbffff400 IEDBASE=0xc0400000 @ 0003fc00
Writing SMRR. base = 0xc0000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU #0 initialized
Waiting for 1 CPUS to stop
Initializing CPU #3
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
POST: 0x60
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13d00 size 5800
microcode: sig=0x206a7 pf=0x10 revision=0x29
CPU: Intel(R) Core(TM) i7-2640M CPU @ 2.80GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
Setting up local APIC... apic_id: 0x03 done.
VMX status: enabled, locked
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 2800
CPU #3 initialized
All AP CPUs stopped (678 loops)
CPU0: stack: bffce000 - bffcf000, lowest used address bffceab0, stack used: 1360 bytes
CPU1: stack: bffcd000 - bffce000, lowest used address bffcdc80, stack used: 896 bytes
CPU2: stack: bffcc000 - bffcd000, lowest used address bffccc80, stack used: 896 bytes
CPU3: stack: bffcb000 - bffcc000, lowest used address bffcbc80, stack used: 896 bytes
CPU_CLUSTER: 0 init finished in 69932 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:00.0 init ...
Disabling PEG12.
Disabling PEG11.
Disabling PEG10.
Disabling PEG60.
Disabling Device 7.
Disabling PEG IO clock.
Set BIOS_RESET_CPL
CPU TDP: 35 Watts
PCI: 00:00.0 init finished in 1019 usecs
POST: 0x75
POST: 0x75
PCI: 00:02.0 init ...
GT Power Management Init
SNB GT2 Power Meter Weights
GT Power Management Init (post VBIOS)
Initializing VGA without OPROM.
EDID:
00 ff ff ff ff ff ff 00 30 e4 d3 02 00 00 00 00 
00 15 01 03 80 1c 10 78 ea 10 a5 96 58 57 8f 28 
20 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 
01 01 01 01 01 01 38 1d 56 d4 50 00 16 30 30 20 
25 00 15 9c 10 00 00 1b 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 fe 00 4c 
47 20 44 69 73 70 6c 61 79 0a 20 20 00 00 00 fe 
00 4c 50 31 32 35 57 48 32 2d 54 4c 42 31 00 f7 
Extracted contents:
header:          00 ff ff ff ff ff ff 00
serial number:   30 e4 d3 02 00 00 00 00 00 15
version:         01 03
basic params:    80 1c 10 78 ea
chroma info:     10 a5 96 58 57 8f 28 20 50 54
established:     00 00 00
standard:        01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
descriptor 1:    38 1d 56 d4 50 00 16 30 30 20 25 00 15 9c 10 00 00 1b
descriptor 2:    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
descriptor 3:    00 00 00 fe 00 4c 47 20 44 69 73 70 6c 61 79 0a 20 20
descriptor 4:    00 00 00 fe 00 4c 50 31 32 35 57 48 32 2d 54 4c 42 31
extensions:      00
checksum:        f7

Manufacturer: LGD Model 2d3 Serial Number 0
Made week 0 of 2011
EDID version: 1.3
Digital display
Maximum image size: 28 cm x 16 cm
Gamma: 220%
Check DPMS levels
DPMS levels: Standby Suspend Off
Supported color formats: RGB 4:4:4, YCrCb 4:2:2
First detailed timing is preferred timing
Established timings supported:
Standard timings supported:
Detailed timings
Hex of detail: 381d56d45000163030202500159c1000001b
Detailed mode (IN HEX): Clock 74800 KHz, 115 mm x 9c mm
               0556 0586 05a6 062a hborder 0
               0300 0302 0307 0316 vborder 0
               +hsync -vsync 
Did detailed timing
Hex of detail: 000000000000000000000000000000000000
Manufacturer-specified data, tag 0
Hex of detail: 000000fe004c4720446973706c61790a2020
ASCII string: LG Display
Hex of detail: 000000fe004c503132355748322d544c4231
ASCII string: LP125WH2-TLB1
Checksum
Checksum: 0xf7 (valid)
WARNING: EDID block does NOT fully conform to EDID 1.3.
	Missing name descriptor
	Missing monitor ranges
bringing up panel at resolution 1376 x 768
Borders 0 x 0
Blank 212 x 22
Sync 32 x 5
Front porch 48 x 2
Spread spectrum clock
Single channel
Polarities 0, 1
Data M1=1307224, N1=8388608
Link frequency 270000 kHz
Link M1=145247, N1=524288
Pixel N=5, M1=24, M2=11, P1=3
Pixel clock 149714 kHz
waiting for panel powerup
panel powered up
PCI: 00:02.0 init finished in 27791 usecs
POST: 0x75
PCI: 00:04.0 init ...
PCI: 00:04.0 init finished in 0 usecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:19.0 init ...
PCI: 00:19.0 init finished in 0 usecs
POST: 0x75
PCI: 00:1a.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1a.0 init finished in 12 usecs
POST: 0x75
PCI: 00:1b.0 init ...
Azalia: base = f1b28000
Azalia: codec_mask = 09
Azalia: Initializing codec #3
Azalia: codec viddid: 80862805
Azalia: verb_size: 16
Azalia: verb loaded.
Azalia: Initializing codec #0
Azalia: codec viddid: 14f1506e
Azalia: verb_size: 52
Azalia: verb loaded.
PCI: 00:1b.0 init finished in 4971 usecs
POST: 0x75
PCI: 00:1c.0 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.0 init finished in 8 usecs
POST: 0x75
PCI: 00:1c.1 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.1 init finished in 8 usecs
POST: 0x75
POST: 0x75
PCI: 00:1c.3 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.3 init finished in 10 usecs
POST: 0x75
PCI: 00:1c.4 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.4 init finished in 7 usecs
POST: 0x75
POST: 0x75
PCI: 00:1c.5 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.5 init finished in 7 usecs
POST: 0x75
POST: 0x75
PCI: 00:1d.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1d.0 init finished in 12 usecs
POST: 0x75
POST: 0x75
PCI: 00:1f.0 init ...
pch: lpc_init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
  reg 0x0000: 0x02000000
  reg 0x0001: 0x00170020
  reg 0x0002: 0x00170020
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 19c00 size 7fc
Set power off after power failure.
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 19c00 size 7fc
NMI sources enabled.
CougarPoint PM init
rtc_failed = 0x0
RTC Init
Enabling BIOS updates outside of SMM... Disabling ACPI via APMC:
done.
pch_spi_init
PCI: 00:1f.0 init finished in 793 usecs
POST: 0x75
PCI: 00:1f.2 init ...
SATA: Initializing...
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 19c00 size 7fc
SATA: Controller in AHCI mode.
ABAR: f1b2d000
PCI: 00:1f.2 init finished in 320 usecs
POST: 0x75
PCI: 00:1f.3 init ...
PCI: 00:1f.3 init finished in 7 usecs
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 02:00.0 init ...
PCI: 02:00.0 init finished in 0 usecs
POST: 0x75
PCI: 03:00.0 init ...
PCI: 03:00.0 init finished in 0 usecs
POST: 0x75
POST: 0x75
PCI: 04:00.0 init ...
PCI: 04:00.0 init finished in 13 usecs
POST: 0x75
PCI: 05:00.0 init ...
PCI: 05:00.0 init finished in 0 usecs
POST: 0x75
POST: 0x75
POST: 0x75
PNP: 00ff.2 init ...
Keyboard init...
Keyboard controller output buffer result timeout
Keyboard controller output buffer result timeout
Keyboard controller output buffer result timeout
Keyboard controller output buffer result timeout
Keyboard controller output buffer result timeout
Keyboard reset failed ACK: 0xaa
PNP: 00ff.2 init finished in 2186603 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ...
I2C: 01:54 init finished in 1 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ...
I2C: 01:55 init finished in 1 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ...
I2C: 01:56 init finished in 0 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ...
I2C: 01:57 init finished in 0 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ...
Locking EEPROM RFID
init EEPROM done
I2C: 01:5c init finished in 25996 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ...
I2C: 01:5d init finished in 0 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ...
I2C: 01:5e init finished in 0 usecs
POST: 0x75
smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ...
I2C: 01:5f init finished in 0 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
PCI: 00:16.0: enabled 0
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 0
PCI: 00:1c.3: enabled 1
PCI: 00:1c.4: enabled 1
PCI: 04:00.0: enabled 1
PCI: 00:1c.6: enabled 0
PCI: 00:1c.5: enabled 1
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 1
PNP: 0c31.0: enabled 1
PNP: 00ff.2: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
I2C: 01:54: enabled 1
I2C: 01:55: enabled 1
I2C: 01:56: enabled 1
I2C: 01:57: enabled 1
I2C: 01:5c: enabled 1
I2C: 01:5d: enabled 1
I2C: 01:5e: enabled 1
I2C: 01:5f: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 0
PCI: 00:04.0: enabled 1
PCI: 02:00.0: enabled 1
PCI: 03:00.0: enabled 1
Unknown device path type: 0
: enabled 1
PCI: 05:00.0: enabled 1
APIC: 01: enabled 1
APIC: 02: enabled 1
APIC: 03: enabled 1
Updating MRC cache data.
No MRC cache in cbmem. Can't update flash.
BS: BS_DEV_INIT times (us): entry 7 run 2317685 exit 1
POST: 0x76
Finalize devices...
PCI: 00:1f.0 final
Devices finalized
BS: BS_POST_DEVICE times (us): entry 0 run 41 exit 0
POST: 0x77
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3 exit 0
POST: 0x79
POST: 0x9c
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 1a440 size 354b
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at bff18000.
ACPI:    * FACS
ACPI:    * DSDT
ACPI:    * FADT
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
Found 1 CPU(s) with 4 core(s) each.
PSS: 2801MHz power 35000 control 0x2300 status 0x2300
PSS: 2800MHz power 35000 control 0x1c00 status 0x1c00
PSS: 2400MHz power 28615 control 0x1800 status 0x1800
PSS: 2000MHz power 22765 control 0x1400 status 0x1400
PSS: 1600MHz power 17346 control 0x1000 status 0x1000
PSS: 1200MHz power 12373 control 0xc00 status 0xc00
PSS: 800MHz power 7830 control 0x800 status 0x800
PSS: 2801MHz power 35000 control 0x2300 status 0x2300
PSS: 2800MHz power 35000 control 0x1c00 status 0x1c00
PSS: 2400MHz power 28615 control 0x1800 status 0x1800
PSS: 2000MHz power 22765 control 0x1400 status 0x1400
PSS: 1600MHz power 17346 control 0x1000 status 0x1000
PSS: 1200MHz power 12373 control 0xc00 status 0xc00
PSS: 800MHz power 7830 control 0x800 status 0x800
PSS: 2801MHz power 35000 control 0x2300 status 0x2300
PSS: 2800MHz power 35000 control 0x1c00 status 0x1c00
PSS: 2400MHz power 28615 control 0x1800 status 0x1800
PSS: 2000MHz power 22765 control 0x1400 status 0x1400
PSS: 1600MHz power 17346 control 0x1000 status 0x1000
PSS: 1200MHz power 12373 control 0xc00 status 0xc00
PSS: 800MHz power 7830 control 0x800 status 0x800
PSS: 2801MHz power 35000 control 0x2300 status 0x2300
PSS: 2800MHz power 35000 control 0x1c00 status 0x1c00
PSS: 2400MHz power 28615 control 0x1800 status 0x1800
PSS: 2000MHz power 22765 control 0x1400 status 0x1400
PSS: 1600MHz power 17346 control 0x1000 status 0x1000
PSS: 1200MHz power 12373 control 0xc00 status 0xc00
PSS: 800MHz power 7830 control 0x800 status 0x800
\_SB.PCI0.LPCB.TPM: LPC TPM PNP: 0c31.0
\_SB.PCI0.RP02.WIFI:  PCI: 02:00.0
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI: added table 3/32, length now 48
ACPI:    * TCPA
TCPA log created at bff07000
ACPI: added table 4/32, length now 52
ACPI:    * MADT
ACPI: added table 5/32, length now 56
current = bff1d180
ACPI:     * DMAR
ACPI: added table 6/32, length now 60
current = bff1d230
GET_VBIOS: aa55 8086 0 0 3
 ... VBIOS found at 000c0000
ACPI:    * HPET
ACPI: added table 7/32, length now 64
ACPI: done.
ACPI tables: 29296 bytes.
smbios_write_tables: bff06000
recv_ec_data: 0x38
recv_ec_data: 0x44
recv_ec_data: 0x48
recv_ec_data: 0x54
recv_ec_data: 0x33
recv_ec_data: 0x34
recv_ec_data: 0x57
recv_ec_data: 0x57
recv_ec_data: 0x14
recv_ec_data: 0x03
Create SMBIOS type 17
Root Device (LENOVO ThinkPad X220)
CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge)
APIC: 00 (unknown)
APIC: acac (Intel SandyBridge/IvyBridge CPU)
DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 04:00.0 (unknown)
PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7)
PNP: 0c31.0 (LPC TPM)
PNP: 00ff.2 (Lenovo H8 EC)
PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
I2C: 01:54 (AT24RF08C)
I2C: 01:55 (AT24RF08C)
I2C: 01:56 (AT24RF08C)
I2C: 01:57 (AT24RF08C)
I2C: 01:5c (AT24RF08C)
I2C: 01:5d (AT24RF08C)
I2C: 01:5e (AT24RF08C)
I2C: 01:5f (AT24RF08C)
PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:04.0 (unknown)
PCI: 02:00.0 (unknown)
PCI: 03:00.0 (unknown)
Unknown device path type: 0
 (unknown)
PCI: 05:00.0 (unknown)
APIC: 01 (unknown)
APIC: 02 (unknown)
APIC: 03 (unknown)
SMBIOS tables: 644 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 7fea
Writing coreboot table at 0xbff3c000
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 19c00 size 7fc
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000a0000-00000000000fffff: RESERVED
 3. 0000000000100000-000000001fffffff: RAM
 4. 0000000020000000-00000000201fffff: RESERVED
 5. 0000000020200000-000000003fffffff: RAM
 6. 0000000040000000-00000000401fffff: RESERVED
 7. 0000000040200000-00000000bff05fff: RAM
 8. 00000000bff06000-00000000bfffffff: CONFIGURATION TABLES
 9. 00000000c0000000-00000000c29fffff: RESERVED
10. 00000000f8000000-00000000fbffffff: RESERVED
11. 00000000fed40000-00000000fed44fff: RESERVED
12. 00000000fed90000-00000000fed91fff: RESERVED
13. 0000000100000000-000000043b5fffff: RAM
Manufacturer: c2
SF: Detected MX25L6405D with sector size 0x1000, total 0x800000
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
FMAP: Found "FLASH" version 1.1 at 700000.
FMAP: base = ff800000 size = 800000 #areas = 3
Wrote coreboot table at: bff3c000, 0xb90 bytes, checksum 32f
coreboot table: 2984 bytes.
IMD ROOT    0. bffff000 00001000
IMD SMALL   1. bfffe000 00001000
CONSOLE     2. bffde000 00020000
ROMSTG STCK 3. bffd9000 00005000
RAMSTAGE    4. bff96000 00043000
57a9e100    5. bff54000 00041870
SMM BACKUP  6. bff44000 00010000
COREBOOT    7. bff3c000 00008000
ACPI        8. bff18000 00024000
ACPI GNVS   9. bff17000 00001000
TCPA LOG   10. bff07000 00010000
SMBIOS     11. bff06000 00000800
IMD small region:
  IMD ROOT    0. bfffec00 00000400
  CAR GLOBALS 1. bfffeac0 00000140
  MEM INFO    2. bfffe960 00000141
  ROMSTAGE    3. bfffe940 00000004
  57a9e000    4. bfffe920 00000018
BS: BS_WRITE_TABLES times (us): entry 0 run 26292 exit 0
POST: 0x7a
CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 88d00 size fdd6
Loading segment from ROM address 0xfff88e38
  code (compression=1)
  New segment dstaddr 0xe1ce0 memsize 0x1e320 srcaddr 0xfff88e70 filesize 0xfd9e
Loading segment from ROM address 0xfff88e54
  Entry Point 0x000ff06e
Payload being loaded at below 1MiB without region being marked as RAM usable.
Loading Segment: addr: 0x00000000000e1ce0 memsz: 0x000000000001e320 filesz: 0x000000000000fd9e
lb: [0x00000000bff97000, 0x00000000bffd8870)
Post relocation: addr: 0x00000000000e1ce0 memsz: 0x000000000001e320 filesz: 0x000000000000fd9e
using LZMA
[ 0x000e1ce0, 00100000, 0x00100000) <- fff88e70
dest 000e1ce0, end 00100000, bouncebuffer ffffffff
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 26091 exit 0
POST: 0x7b
PCH watchdog disabled
Jumping to boot code at 000ff06e(bff3c000)
POST: 0xf8
CPU0: stack: bffce000 - bffcf000, lowest used address bffcea50, stack used: 1456 bytes
SeaBIOS (version rel-1.10.0-61-gec6cb17)
BUILD: gcc: (coreboot toolchain v1.47 August 16th, 2017) 6.3.0 binutils: (GNU Binutils) 2.28
Found coreboot cbmem console @ bffde000
Found mainboard LENOVO ThinkPad X220
Relocating init from 0x000e32e0 to 0xbfeb94a0 (size 51808)
Found CBFS header at 0xfff00138
multiboot: eax=bffc6680, ebx=bffc6634
Found 19 PCI devices (max PCI bus is 05)
Copying SMBIOS entry point from 0xbff06000 to 0x000f7620
Copying ACPI RSDP from 0xbff18000 to 0x000f75f0
Using pmtimer, ioport 0x508
Scan for VGA option rom
Running option rom at c000:0003
pmm call arg1=0
Turning on vga text mode console
SeaBIOS (version rel-1.10.0-61-gec6cb17)
Machine UUID XXXXXXXX-XXXX-XXXX-XXXX-XXXXXXXXXXX
XHCI init on dev 03:00.0: regs @ 0xf0800000, 4 ports, 32 slots, 32 byte contexts
XHCI    extcap 0x1 @ 0xf0800500
XHCI    protocol USB  3.00, 2 ports (offset 1), def 0
XHCI    protocol USB  2.00, 2 ports (offset 3), def 0
XHCI init on dev 05:00.0: regs @ 0xf1a00000, 4 ports, 32 slots, 32 byte contexts
XHCI    extcap 0x1 @ 0xf1a00500
XHCI    protocol USB  3.00, 2 ports (offset 1), def 0
XHCI    protocol USB  2.00, 2 ports (offset 3), def 0
EHCI init on dev 00:1a.0 (regs=0xf1b2e020)
EHCI init on dev 00:1d.0 (regs=0xf1b2f020)
AHCI controller at 00:1f.2, iobase 0xf1b2d000, irq 10
Searching bootorder for: /pci@i0cf8/pci-bridge@1c,4/*@0
Found 0 lpt ports
Found 0 serial ports
Searching bootorder for: /rom@img/memtest
Searching bootorder for: /rom@img/tint
Searching bootorder for: /rom@img/nvramcui
Searching bootorder for: /rom@img/coreinfo
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0
AHCI/0: Set transfer mode to UDMA-6
AHCI/0: registering: "AHCI/0: Samsung SSD 840 PRO Series ATA-9 Hard-Disk (238 GiBytes)"
XHCI port #3: 0x00200e03, powered, enabled, pls 0, speed 3 [High]
XHCI no devices found
Initialized USB HUB (0 ports used)
Initialized USB HUB (0 ports used)
PS2 keyboard initialized
WARNING - Timeout at xhci_event_wait:735!
xhci_alloc_pipe: address device: failed (cc -1)
WARNING - Timeout at xhci_event_wait:735!
xhci_alloc_pipe: disable failed (cc -1)
XHCI port #1: 0x00001203, powered, enabled, pls 0, speed 4 [Super]
WARNING - Timeout at xhci_event_wait:735!
xhci_alloc_pipe: enable slot: failed
XHCI no devices found
WARNING - Timeout at wait_bit:302!
WARNING - Timeout at ehci_wait_td:516!
ehci pipe=0xbfead500 cur=bfea2dc0 tok=80080d80 next=bfea2e00 td=0xbfea2dc0 status=80080d80
Initialized USB HUB (0 ports used)
All threads complete.
Scan for option roms
Running option rom at c700:0003
pmm call arg1=1
pmm call arg1=0
pmm call arg1=1
pmm call arg1=0
Searching bootorder for: /pci@i0cf8/*@19

Press ESC for boot menu.

Searching bootorder for: HALT
drive 0x000f7580: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=500118192
Space available for UMB: c8000-ec800, f6e40-f7580
Returned 245760 bytes of ZoneHigh
e820 map has 13 items:
  0: 0000000000000000 - 000000000009fc00 = 1 RAM
  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 0000000020000000 = 1 RAM
  4: 0000000020000000 - 0000000020200000 = 2 RESERVED
  5: 0000000020200000 - 0000000040000000 = 1 RAM
  6: 0000000040000000 - 0000000040200000 = 2 RESERVED
  7: 0000000040200000 - 00000000bff02000 = 1 RAM
  8: 00000000bff02000 - 00000000c2a00000 = 2 RESERVED
  9: 00000000f8000000 - 00000000fc000000 = 2 RESERVED
  10: 00000000fed40000 - 00000000fed45000 = 2 RESERVED
  11: 00000000fed90000 - 00000000fed92000 = 2 RESERVED
  12: 0000000100000000 - 000000043b600000 = 1 RAM
enter handle_19:
  NULL
Booting from Hard Disk...
Booting from 0000:7c00

Unmapping 0MB of virtual memory at 0x7fb0d54dd000.