The qemu part of this patch can be found in https://lists.gnu.org/archive/html/qemu-devel/2018-09/msg01988.html
pxb-pcie device in qemu uses only one pci domain(0) so far, which means there are at most 256 busses. However, pcie topology requires one bus per device, which will use up the busses soon if there are more pcie devices.
To solve the problem, QEMU can put the pxb-pcie in separate pci domain so we can get more devices. As QEMU relies on seabios to allocate space for its mcfg table, we must modify the seabios to configure mcfg_base and mcfg_size for qemu.
Since pxb-pcie may only uses a subset of all 256 busses in a domain, we let qemu pass its desired mcfg_size as a hidden bar, seabios just decides the mcfg_base for it.
Compared with previous design, mmconfig is not put above 4g anymore, but inside [0x80000000, 0xb0000000), and leaves the major part of configuration to guest OS, which makes the whole part of code much simpler.
Changelog: v3 <- v2 - Refactor design so that seabios only does minimal mcfg configure, and leaves everything else to guest os. This makes the code much simpler. - Does not put mcfg over 4g anymore, but inside [0x80000000, 0xb0000000) Over 4g placement can be expected in future version.
v2 <- v1 - Fix bugs in filtering domains when traversing pci devices - Reformat some hardcoded codes, such as probing the pci device in pci_setup
Zihan Yang (1): pciinit: setup mcfg for pxb-pcie to support multiple pci domains
src/fw/dev-q35.h | 7 +++++++ src/fw/pciinit.c | 32 ++++++++++++++++++++++++++++++++ src/hw/pci_ids.h | 1 + 3 files changed, 40 insertions(+)