On Wed, Jul 06, 2011 at 12:28:00PM +0200, Gerd Hoffmann wrote:
On 07/06/11 10:54, Michael S. Tsirkin wrote:
On Tue, Jul 05, 2011 at 05:27:00PM +0200, Gerd Hoffmann wrote:
diff --git a/src/pciinit.c b/src/pciinit.c index bfff3db..b0a712d 100644 --- a/src/pciinit.c +++ b/src/pciinit.c @@ -12,15 +12,83 @@ #include "pci_regs.h" // PCI_COMMAND #include "xen.h" // usingXen
-#define PCI_ROM_SLOT 6 -#define PCI_NUM_REGIONS 7 +#define PCI_IO_INDEX_SHIFT 2 +#define PCI_MEM_INDEX_SHIFT 12
-static void pci_bios_init_device_in_bus(int bus); +#define PCI_BRIDGE_IO_MIN 0x100
This seems a little low: virtio block devices need I think 64 bytes at the moment. To have 32 of these behind a bridge we'll need to allocate 2K of io memory per bridge. this means we can have at most 31 such bridges but that seems a reasonable limitation to me.
Guess we'll need to have different bridges in different ways then, depending on the number of devices which could be hooked up there. PCI express ports with a single device behind it certainly needs less ressources than a bridge which can hook up 32 devices ...
With the q35 machine I see a bunch of different pci express bridges:
Express Root Port Express Upstream Port Express Downstream Port
and classic pci bridges (DECchip 21154).
Guess to identify the pci express devices we'll have to look at the capabilities?
Suggestions how to classify all these?
7.8.2 PCI Express capabilities register includes the device/port type register. Look at 1.3 PCI Express Fabric Topology to understand what does each device type do.
BTW, PCI bridges have slot numbering capabilities for extension slots. I'm still trying to figure out how hotplug works there but, if present, that gives an upper limit on the number of slots. It's not present in system expansion slots though and we didn't implement in qemu at all.