On Thu, Mar 01, 2012 at 06:50:43PM +1300, Alexey Korolev wrote:
This patch series enables 64bit BAR support in seabios. It has a bit different approach for resources accounting, We did this because we wanted: a) Provide 64bit bar support for PCI BARs and bridges with 64bit memory window. b) Allow migration to 64bit bit ranges if we did not fit into 32bit range c) Keep implementation simple.
Hrmm. By my count, this would be the third "rewrite" of the PCI bar initialization in the last 14 months.
The patch series includes 6 patches. In the 1st patch we introduce new structures.
Patch 1 does not look like it will compile independently. There is no point in breaking up patches if each part doesn't compile.
In the 2nd patch we introduce support functions for basic hlist operations, plus modify service functions to support 64bits address ranges. Note: I've seen similar hlist operations in post memory manager and stack location operations, it makes sense to move them to a header file.
In the 3rd patch a new function to fill pci_region structures with entries, and discover topology is added.
In the 4th patch we define address range for pci_region structure, migrate entries to 64bits address range if necessary, and program PCI BAR addresses and bridge regions.
In the 6th patch we clear old code.
Given the churn in this area, I don't want to commit patches that do wholesale code replacement. I'd prefer to see each patch independently add some functionality and perform its related cleanup.
Also, since Gerd has some patches pending in this area, we should figure out which direction makes sense. Can you explain on how this 64bit support is different from the support proposed by Gerd?