Author: wmb Date: Fri Jul 27 04:49:02 2012 New Revision: 3084 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3084
Log: OLPC CL4 - handle different UART assignments between CL4 and 1.75.
Modified: cpu/arm/olpc/1.75/config.fth cpu/arm/olpc/1.75/fw.bth cpu/arm/olpc/1.75/gpiopins.fth cpu/arm/olpc/3.0/config.fth cpu/arm/olpc/3.0/fw.bth cpu/arm/olpc/bsl.fth cpu/arm/olpc/cl4/fw.bth cpu/arm/olpc/cl4/gpiopins.fth
Modified: cpu/arm/olpc/1.75/config.fth ============================================================================== --- cpu/arm/olpc/1.75/config.fth Sun Jul 22 16:48:28 2012 (r3083) +++ cpu/arm/olpc/1.75/config.fth Fri Jul 27 04:49:02 2012 (r3084) @@ -31,6 +31,9 @@ char 4 constant expected-ec-version h# 8000 value /ec-flash
-h# 10000 constant l2-#sets +\ These constants are correct for XO-1.75 and XO-CL4; they might +\ need to be changed for different hardware. See setup-gpios-hack + +fload ${BP}/cpu/arm/mmp2/soc-config.fth
fload ${BP}/cpu/arm/olpc/1.75/gpiopins.fth
Modified: cpu/arm/olpc/1.75/fw.bth ============================================================================== --- cpu/arm/olpc/1.75/fw.bth Sun Jul 22 16:48:28 2012 (r3083) +++ cpu/arm/olpc/1.75/fw.bth Fri Jul 27 04:49:02 2012 (r3084) @@ -7,6 +7,9 @@
" fw.tag" r/w create-file drop tag-file !
+h# 17000 +io constant bsl-uart-base \ UART2 +h# 30 constant bsl-uart-clock-offset \ APBC_UART2_CLK_RST + fload ${BP}/cpu/arm/olpc/build-fw.fth
\ The internal SD card shares the host controller circuitry with @@ -20,6 +23,26 @@
fload ${BP}/cpu/arm/olpc/emmc.fth
+\ Setup UART configuration +h# d4018000 to uart-base \ UART3 +devalias com1 /uart@d4018000 + +dev /uart@d4030000 \ UART1 + 0 " linux,unit#" integer-property +device-end + +dev /uart@d4017000 \ UART2 + " disabled" " status" string-property +device-end + +dev /uart@d4018000 \ UART3 + 1 " linux,unit#" integer-property +device-end + +dev /uart@d4016000 \ UART4 + " disabled" " status" string-property +device-end + \ Device node for internal microSD dev /sd new-device
Modified: cpu/arm/olpc/1.75/gpiopins.fth ============================================================================== --- cpu/arm/olpc/1.75/gpiopins.fth Sun Jul 22 16:48:28 2012 (r3083) +++ cpu/arm/olpc/1.75/gpiopins.fth Fri Jul 27 04:49:02 2012 (r3084) @@ -60,3 +60,7 @@
d# 15 constant rotate-gpio# d# 17 constant check-gpio# + +d# 14 constant touch-hd-gpio# +d# 139 constant touch-tck-gpio# +d# 98 constant touch-rst-gpio#
Modified: cpu/arm/olpc/3.0/config.fth ============================================================================== --- cpu/arm/olpc/3.0/config.fth Sun Jul 22 16:48:28 2012 (r3083) +++ cpu/arm/olpc/3.0/config.fth Fri Jul 27 04:49:02 2012 (r3084) @@ -30,6 +30,8 @@ char 4 constant expected-ec-version h# 8000 value /ec-flash
+h# 18000 constant console-uart-base + fload ${BP}/cpu/arm/mmp2/soc-config.fth
fload ${BP}/cpu/arm/olpc/3.0/gpiopins.fth
Modified: cpu/arm/olpc/3.0/fw.bth ============================================================================== --- cpu/arm/olpc/3.0/fw.bth Sun Jul 22 16:48:28 2012 (r3083) +++ cpu/arm/olpc/3.0/fw.bth Fri Jul 27 04:49:02 2012 (r3084) @@ -9,6 +9,26 @@
fload ${BP}/cpu/arm/olpc/build-fw.fth
+\ Setup UART configuration +h# d4018000 to uart-base \ UART3 +devalias com1 /uart@d4018000 + +dev /uart@d4030000 \ UART1 + 0 " linux,unit#" integer-property +device-end + +dev /uart@d4017000 \ UART2 + " disabled" " status" string-property +device-end + +dev /uart@d4018000 \ UART3 + 1 " linux,unit#" integer-property +device-end + +dev /uart@d4016000 \ UART4 + " disabled" " status" string-property +device-end + fload ${BP}/cpu/arm/olpc/emmc.fth devalias int /sd/disk@3
Modified: cpu/arm/olpc/bsl.fth ============================================================================== --- cpu/arm/olpc/bsl.fth Sun Jul 22 16:48:28 2012 (r3083) +++ cpu/arm/olpc/bsl.fth Fri Jul 27 04:49:02 2012 (r3084) @@ -4,20 +4,13 @@ \ devalias bsl /uart@NNNN:9600,8,e,1//bsl-protocol
-\ These constants are correct for XO-1.75 and XO-CL4; they might -\ need to be changed for different hardware. See setup-gpios-hack - -h# 17000 +io constant bsl-uart-base \ UART2 - -d# 98 constant bsl-test-gpio# \ GPIO98 is alternate function 0 (the default) -d# 152 constant bsl-rst-gpio# \ SM_BELn, with GPIO152 as alternate function 1 - \ This is platform-dependent
: setup-gpios ( -- ) - 3 d# 55 af! 3 d# 56 af! \ Setup pins for UART2 - 0 bsl-test-gpio# af! \ Set to GPIO function - 1 bsl-rst-gpio# af! \ Set to GPIO function (AF0 is SM_BELn for this pin) +\ The pin setup should be done in CForth, but it's complicated by the fact that the touch-enabled CL2 uses GPIO 56 differently from the ordinary one +[ifdef] olpc-cl2 3 d# 55 af! 3 d# 56 af! [then] \ Setup pins for UART2 + 0 touch-tck-gpio# af! \ Set to GPIO function + 1 touch-rst-gpio# af! \ Set to GPIO function (AF0 is SM_BELn for this pin) ;
0 [if] @@ -33,8 +26,8 @@ d# 115 to test-gpio# \ Normally UART3 TXD, but repurposed as a GPIO d# 116 to rst-gpio# \ Normally UART3 RXD, but repurposed as a GPIO
- 0 bsl-test-gpio# af! \ Set to GPIO function instead of UART3 - 0 bsl-rst-gpio# af! \ Set to GPIO function instead of UART3 + 0 touch-tck-gpio# af! \ Set to GPIO function instead of UART3 + 0 touch-rst-gpio# af! \ Set to GPIO function instead of UART3 ; [then]
@@ -43,8 +36,8 @@ : bsl-baud ( baud-rate -- ) \ 9600,8,e,1 uart-base >r ( baud-rate r: uart-base ) bsl-uart-base to uart-base - h# 13 h# 30 apbc! \ enable the uart2 clocks - h# 40 1 uart! \ uart unit enable + h# 13 bsl-uart-clock-offset apbc! \ enable the uart2 clocks + h# 40 1 uart! \ uart unit enable baud h# 1b 3 uart! ( r: uart-base ) r> to uart-base ( ) ; @@ -63,35 +56,35 @@ : bsl-open ( -- ) setup-gpios
- bsl-rst-gpio# gpio-clr - bsl-test-gpio# gpio-clr - bsl-rst-gpio# gpio-dir-out - bsl-test-gpio# gpio-dir-out + touch-rst-gpio# gpio-clr + touch-tck-gpio# gpio-clr + touch-rst-gpio# gpio-dir-out + touch-tck-gpio# gpio-dir-out
d# 9600 bsl-baud ; : bsl-close ( -- ) - bsl-rst-gpio# gpio-dir-in - bsl-test-gpio# gpio-dir-in + touch-rst-gpio# gpio-dir-in + touch-tck-gpio# gpio-dir-in ; : msp430-off ( -- ) - bsl-rst-gpio# gpio-clr - bsl-test-gpio# gpio-clr + touch-rst-gpio# gpio-clr + touch-tck-gpio# gpio-clr ;
: dly ( -- ) d# 10 ms ; : start-bsl ( -- ) bsl-open d# 250 ms - bsl-test-gpio# gpio-set + touch-tck-gpio# gpio-set dly - bsl-test-gpio# gpio-clr + touch-tck-gpio# gpio-clr dly - bsl-test-gpio# gpio-set + touch-tck-gpio# gpio-set dly - bsl-rst-gpio# gpio-set + touch-rst-gpio# gpio-set dly - bsl-test-gpio# gpio-clr + touch-tck-gpio# gpio-clr ;
: flush-bsl
Modified: cpu/arm/olpc/cl4/fw.bth ============================================================================== --- cpu/arm/olpc/cl4/fw.bth Sun Jul 22 16:48:28 2012 (r3083) +++ cpu/arm/olpc/cl4/fw.bth Fri Jul 27 04:49:02 2012 (r3084) @@ -7,8 +7,33 @@
" fw.tag" r/w create-file drop tag-file !
+h# 16000 +io constant bsl-uart-base \ UART4 +h# 88 constant bsl-uart-clock-offset \ APBC_UART4_CLK_RST + fload ${BP}/cpu/arm/olpc/build-fw.fth
+true to stand-init-debug? + +\ Setup UART configuration +h# d4017000 to uart-base \ UART2 +devalias com1 /uart@d4017000 + +dev /uart@d4030000 \ UART1 + 0 " linux,unit#" integer-property +device-end + +dev /uart@d4017000 \ UART2 + 1 " linux,unit#" integer-property +device-end + +dev /uart@d4018000 \ UART3 + " disabled" " status" string-property +device-end + +dev /uart@d4016000 \ UART4 + " disabled" " status" string-property \ Used for touchscreen BSL +device-end + dev /sd new-device 4 encode-int " reg" property
Modified: cpu/arm/olpc/cl4/gpiopins.fth ============================================================================== --- cpu/arm/olpc/cl4/gpiopins.fth Sun Jul 22 16:48:28 2012 (r3083) +++ cpu/arm/olpc/cl4/gpiopins.fth Fri Jul 27 04:49:02 2012 (r3084) @@ -11,8 +11,8 @@ d# 155 constant ec-spi-cmd-gpio# d# 113 constant ec-spi-ack-gpio#
-d# 167 constant dcon-scl-gpio# -d# 168 constant dcon-sda-gpio# +d# 168 constant dcon-scl-gpio# +d# 167 constant dcon-sda-gpio#
d# 126 constant dcon-irq-gpio# d# 142 constant dcon-load-gpio#
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