Author: wmb Date: Sat Jun 4 00:56:50 2011 New Revision: 2243 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2243
Log: OLPC XO-1.75 - Moved the page table into the firmware RAM area, so the only precious thing in low memory is the vector table. This makes it easier to test memory.
Modified: cpu/arm/basefw.bth cpu/arm/mmp2/rawboot.fth cpu/arm/olpc/1.75/addrs.fth cpu/arm/olpc/resetvec.bth
Modified: cpu/arm/basefw.bth ============================================================================== --- cpu/arm/basefw.bth Fri Jun 3 04:55:41 2011 (r2242) +++ cpu/arm/basefw.bth Sat Jun 4 00:56:50 2011 (r2243) @@ -86,12 +86,6 @@ \ XXX remove the OS file commands from tools.dic fload ${BP}/ofw/core/filecmds.fth \ File commands: dir, del, ren, etc.
-\ Defined by CPU core -h# 1000 to pagesize -d# 12 to pageshift -h# 10.0000 constant /section -h# 4000 constant /page-table - [ifndef] no-heads resident dispose 0 0 set-transize \ true is suppress-transient
Modified: cpu/arm/mmp2/rawboot.fth ============================================================================== --- cpu/arm/mmp2/rawboot.fth Fri Jun 3 04:55:41 2011 (r2242) +++ cpu/arm/mmp2/rawboot.fth Sat Jun 4 00:56:50 2011 (r2243) @@ -2,13 +2,13 @@ \ to the setup that start-forth (see arm/boot.fth) wants. \ We get here via a call instruction at origin+8, which is inserted below
-code stand-cold-code ( r0: 0 r1: board-id r2: &kernel-args lr: &aif_header+8c ) +label stand-cold-code ( r0: 0 r1: board-id r2: &kernel-args lr: &aif_header+8c ) here origin 8 + put-call \ Insert call instruction
\ Put the arguments in safe registers sub r6,lr,#0x8c \ r6 points to header (lr set by code at origin) mov r7,#0 \ r7: functions - add r8,r6,`/fw-ram` \ r8: memtop - 2MiB above load address + add r8,r6,`stack-offset` \ r8: memtop - 2MiB above load address \ r9 is up mov r10,#0 \ r10: argc mov r11,r2 \ r11: argv (kernel args)
Modified: cpu/arm/olpc/1.75/addrs.fth ============================================================================== --- cpu/arm/olpc/1.75/addrs.fth Fri Jun 3 04:55:41 2011 (r2242) +++ cpu/arm/olpc/1.75/addrs.fth Sat Jun 4 00:56:50 2011 (r2243) @@ -1,4 +1,7 @@ \ Platform design choices + +fload ${BP}/cpu/arm/mmuparams.fth + h# 2000.0000 constant total-ram-size
h# 1fc0.0000 constant fb-pa @@ -38,6 +41,10 @@ [then]
h# 0020.0000 constant /fw-ram +/fw-ram /page-table - constant page-table-offset +page-table-offset constant stack-offset \ Stack is below this + +fw-pa page-table-offset + constant page-table-pa
\ h# 0110.0000 constant def-load-base h# 0800.0000 constant def-load-base @@ -47,8 +54,6 @@ h# 10.0000 constant heap-size heap-size constant initial-heap-size
-h# 40.0000 constant page-table-pa - \ RAM address where the Security Processor code places the subset of the dropin module \ image that it copies out of SPI FLASH. h# 900.0000 constant 'dropins \ Must agree with 'compressed in cforth/src/app/arm-xo-1.75/
Modified: cpu/arm/olpc/resetvec.bth ============================================================================== --- cpu/arm/olpc/resetvec.bth Fri Jun 3 04:55:41 2011 (r2242) +++ cpu/arm/olpc/resetvec.bth Sat Jun 4 00:56:50 2011 (r2243) @@ -30,8 +30,8 @@ ; previous definitions
-/fw-ram h# 2.0000 - constant workspace-offset \ Offset of inflater workspace within destination RAM -/fw-ram constant stack-offset \ Offset of top of inflater stack within destination RAM +\ /fw-ram constant stack-offset \ Offset of top of inflater stack within destination RAM +stack-offset h# 2.0000 - constant workspace-offset \ Offset of inflater workspace within destination RAM
start-assembling
@@ -146,7 +146,8 @@ [then]
\ Setup the page (section) table and turn on the MMU and caches - set r0,`page-table-pa #` +\ set r0,`page-table-pa #` + set r0,`fw-virt-base page-table-offset + #` bl `init-map` \ Setup the initial virtual address map bl `enable-mmu` \ Turn on the MMU bl `caches-on` \ Turn on the caches
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