Author: wmb Date: Wed Aug 29 21:00:05 2012 New Revision: 3247 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3247
Log: OLPC ARM - Ensure that the main SDHC clock divisor is set properly when changing the SDH1 clock register.
Modified: cpu/arm/mmp2/pmua.fth
Modified: cpu/arm/mmp2/pmua.fth ============================================================================== --- cpu/arm/mmp2/pmua.fth Wed Aug 29 20:53:05 2012 (r3246) +++ cpu/arm/mmp2/pmua.fth Wed Aug 29 21:00:05 2012 (r3247) @@ -82,7 +82,7 @@ h# 048 +int h# 19 +int h# 19 +int d# 0 +int \ 0 IRE h# 04c +int h# fffff +int h# 71b +int d# 400,000,000 +int \ 1 DISPLAY1 h# 050 +int h# 3f +int h# 3f +int d# 0 +int \ 2 CCIC -h# 054 +int h# 1b +int h# 1b +int d# 200,000,000 +int \ 3 SDH1 +h# 054 +int h# 1b +int h# 41b +int d# 200,000,000 +int \ 3 SDH1 h# 058 +int h# 1b +int h# 1b +int d# 200,000,000 +int \ 4 SDH2 h# 05c +int h# 09 +int h# 09 +int d# 480,000,000 +int \ 5 USB h# 060 +int h# 1ff +int h# bf +int d# 100,000,000 +int \ 6 NF