Author: wmb Date: Tue Jul 31 11:05:47 2012 New Revision: 3104 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3104
Log: OLPC ARM - revert the change to the SSP SSP_SSPSP register, as it was ineffective. Leave the cosmetic change to the way the other register offsets were specified, for clarity.
Modified: cpu/arm/mmp2/sspspi.fth
Modified: cpu/arm/mmp2/sspspi.fth ============================================================================== --- cpu/arm/mmp2/sspspi.fth Tue Jul 31 07:38:25 2012 (r3103) +++ cpu/arm/mmp2/sspspi.fth Tue Jul 31 11:05:47 2012 (r3104) @@ -11,14 +11,12 @@ : ssp-sscr1 ( -- adr ) ssp-base 4 + ; : ssp-sssr ( -- adr ) ssp-base 8 + ; : ssp-ssdr ( -- adr ) ssp-base h# 10 + ; -: ssp-sspsp ( -- adr ) ssp-base h# 2c + ;
: ssp-spi-start ( -- ) \ Avoid reinitializing the device after the first time, as that \ seems to cause glitches that confuse the SPI FLASH chip ssp-sscr1 io@ 0= if exit then
- h# 01 ssp-sspsp io! h# 07 ssp-sscr0 io! 0 ssp-sscr1 io! h# 87 ssp-sscr0 io!