Here is what I get on SMP bootup.. It goes into an infinite loop at the end. I generated the default MP tables on my own. Any suggestions? - James
Linux version 2.4.0-test1 (jimi@yellow) (gcc version egcs-2.91.66 19990314/Linux (egcs-1.1.2 release)) #41 SMP Fri Jun 16 11:38:58 MDT 2000. BIOS-provided physical RAM map:. e820: 000000000009f000 @ 0000000000000000 (usable). e820: 0000000003e00000 @ 0000000000100000 (usable). James: Generating my own MP Floating Pointer table kmem_alloc: NULL ptr (name=unknown). On node 0 totalpages: 16128. zone(0): 4096 pages.. zone(1): 12032 pages.. zone(2): 0 pages.. Intel MultiProcessor Specification v1.4. Virtual Wire compatibility mode.. Default MP configuration #5. Processor #0 Pentium(tm) Pro APIC version 16. Floating point unit present.. Machine Exception supported.. 64 bit compare & exchange supported.. Processor #1 Pentium(tm) Pro APIC version 16. Floating point unit present.. Machine Exception supported.. 64 bit compare & exchange supported.. Bus #0 is ISA . Bus #1 is PCI . I/O APIC #2 Version 16 at 0xFEC00000.. Int: type 0, pol 0, trig 0, bus 0, IRQ 00, APIC ID 2, APIC INT 02. Int: type 0, pol 0, trig 0, bus 0, IRQ 01, APIC ID 2, APIC INT 01. Int: type 0, pol 0, trig 0, bus 0, IRQ 03, APIC ID 2, APIC INT 03. Int: type 0, pol 0, trig 0, bus 0, IRQ 04, APIC ID 2, APIC INT 04. Int: type 0, pol 0, trig 0, bus 0, IRQ 05, APIC ID 2, APIC INT 05. Int: type 0, pol 0, trig 0, bus 0, IRQ 06, APIC ID 2, APIC INT 06. Int: type 0, pol 0, trig 0, bus 0, IRQ 07, APIC ID 2, APIC INT 07. Int: type 0, pol 0, trig 0, bus 0, IRQ 08, APIC ID 2, APIC INT 08. Int: type 0, pol 0, trig 0, bus 0, IRQ 09, APIC ID 2, APIC INT 09. Int: type 0, pol 0, trig 0, bus 0, IRQ 0a, APIC ID 2, APIC INT 0a. Int: type 0, pol 0, trig 0, bus 0, IRQ 0b, APIC ID 2, APIC INT 0b. Int: type 0, pol 0, trig 0, bus 0, IRQ 0c, APIC ID 2, APIC INT 0c. Int: type 0, pol 0, trig 0, bus 0, IRQ 0d, APIC ID 2, APIC INT 0d. Int: type 0, pol 0, trig 0, bus 0, IRQ 0e, APIC ID 2, APIC INT 0e. Int: type 0, pol 0, trig 0, bus 0, IRQ 0f, APIC ID 2, APIC INT 0f. Int: type 3, pol 0, trig 0, bus 0, IRQ 00, APIC ID 2, APIC INT 00. Lint: type 3, pol 0, trig 0, bus 0, IRQ 00, APIC ID ff, APIC LINT 00. Lint: type 1, pol 0, trig 0, bus 0, IRQ 00, APIC ID ff, APIC LINT 01. Processors: 2. James: a) 1 b) 3 c) 16 d) 16 e) fee00000. mapped APIC to ffffe000 (fee00000). mapped IOAPIC to ffffd000 (fec00000). Enabling extended fast FPU save and restore ... done.. Enabling KNI unmasked exception support ... done.. Kernel command line: root=/dev/hda1 ide0=reset. Initializing CPU#0. Detected 497438524 Hz processor.. Console: colour dummy device 80x25. Calibrating delay loop... 989.59 BogoMIPS. Memory: 61860k/64512k available (643k kernel code, 2264k reserved, 82k data, 180k init, 0k highmem). Dentry-cache hash table entries: 8192 (order: 4, 65536 bytes). Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes). Page-cache hash table entries: 16384 (order: 4, 65536 bytes). kmem_create: Poisoning requested, but con given - bdev_cache. Inode-cache hash table entries: 4096 (order: 3, 32768 bytes). kmem_create: Poisoning requested, but con given - inode_cache. CPU serial number disabled.. Checking 386/387 coupling... OK, FPU using exception 16 error reporting.. Checking 'hlt' instruction... OK.. POSIX conformance testing by UNIFIX. mtrr: v1.36 (20000221) Richard Gooch (rgooch@atnf.csiro.au). CPU serial number disabled.. CPU0: Intel Pentium III (Katmai) stepping 03. per-CPU timeslice cutoff: 0.00 usecs.. weird, boot CPU (#15) not listed by the BIOS.. Getting VERSION: ffffffff. Getting VERSION: ffffffff. Getting LVT0: ffffffff. Getting LVT1: ffffffff. masked ExtINT on CPU#0. ESR value before enabling vector: ffffffff. ESR value after enabling vector: ffffffff. CPU present map: 8003. Booting processor 1/0 eip 2000. Setting warm reset code and vector.. 1.. 2.. 3.. Asserting INIT.. Waiting for send to finish.... +
On Fri, 16 Jun 2000, Ronald G Minnich wrote:
on the SiS, 512Kb-64Kb. On the intel, well maybe that too.
It's all driven by the damned NVRAM flasher program.
what you at?
cell: 505 699 0502, landline is 302 478 5291 except I'm using it for 10 more minutes.
ron
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On Fri, 16 Jun 2000, James V Hendricks wrote:
Here is what I get on SMP bootup.. It goes into an infinite loop at the end. I generated the default MP tables on my own. Any suggestions?
- James
[...]
James: a) 1 b) 3 c) 16 d) 16 e) fee00000. mapped APIC to ffffe000 (fee00000).
^^^^^^^^ [...]
weird, boot CPU (#15) not listed by the BIOS.. Getting VERSION: ffffffff. Getting VERSION: ffffffff. Getting LVT0: ffffffff. Getting LVT1: ffffffff. masked ExtINT on CPU#0. ESR value before enabling vector: ffffffff. ESR value after enabling vector: ffffffff.
These values are definitely wrong (floating bus?). Are you sure you mapped the local APIC at physical address fee00000 via the MSR? Alternatively you might just fill the MP table according to your hardware.
It is floating bus, I am sure of that. We just have to see why.
ron
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On Mon, 19 Jun 2000, Ronald G Minnich wrote:
It is floating bus, I am sure of that. We just have to see why.
The local APIC is internal to the CPU. Make sure it is enabled and the MP table correctly reports its mapping address. For how to enable and remap the APIC see PPro/PII/PIII manuals -- there is an MSR which provides this functionality. I can't recall it's number nor layout at the moment, though.
The local APIC is internal to the CPU. Make sure it is enabled and the MP table correctly reports its mapping address. For how to enable and remap the APIC see PPro/PII/PIII manuals -- there is an MSR which provides this functionality. I can't recall it's number nor layout at the moment, though.
Hmmmm... Since the APIC seems to be enabled (? maybe ?), perhaps the MP tables aren't reporting the mapping address correctly.. - James
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Hmmmm... Since the APIC seems to be enabled (? maybe ?), perhaps the MP tables aren't reporting the mapping address correctly..
Nevermind, my bad; the APIC had been enabled and then disabled by later code... It is fixed now, we're going to test how far we get in just one moment in the SMP Kernel. The uniprocessor kernel works just fine. - james
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On Mon, 19 Jun 2000, James Hendricks wrote:
Hmmmm... Since the APIC seems to be enabled (? maybe ?), perhaps the MP
If cpuid flags state APIC is present then it's enabled. Otherwise it's not.
tables aren't reporting the mapping address correctly..
That is easy to check -- the relevant MSR is r/w.
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James Hendricks -
James V Hendricks -
Maciej W. Rozycki -
Ronald G Minnich