This patch should get all 7447a cpus working with openbios, needs a corresponding patch to Qemu-ppc for the v1.5
diff --git a/arch/ppc/qemu/init.c b/arch/ppc/qemu/init.c index 5ce080c..09b2db4 100644 --- a/arch/ppc/qemu/init.c +++ b/arch/ppc/qemu/init.c @@ -550,6 +550,18 @@ static const struct cpudef ppc_defs[] = { .tlb_size = 0x80, .initfn = cpu_g4_init, }, + .iu_version = 0x80030000, + .name = "PowerPC,G4", + .icache_size = 0x8000, + .dcache_size = 0x8000, + .icache_sets = 0x80, + .dcache_sets = 0x80, + .icache_block_size = 0x20, + .dcache_block_size = 0x20, + .tlb_sets = 0x40, + .tlb_size = 0x80, + .initfn = cpu_g4_init, +}, { .iu_version = 0x00390000, .name = "PowerPC,970",
On Sat, Jan 20, 2018 at 09:38:21AM -0500, Jd Lyons via OpenBIOS wrote:
This patch should get all 7447a cpus working with openbios, needs a corresponding patch to Qemu-ppc for the v1.5
diff --git a/arch/ppc/qemu/init.c b/arch/ppc/qemu/init.c index 5ce080c..09b2db4 100644 --- a/arch/ppc/qemu/init.c +++ b/arch/ppc/qemu/init.c @@ -550,6 +550,18 @@ static const struct cpudef ppc_defs[] = { .tlb_size = 0x80, .initfn = cpu_g4_init, },
- .iu_version = 0x80030000,
- .name = "PowerPC,G4",
- .icache_size = 0x8000,
- .dcache_size = 0x8000,
- .icache_sets = 0x80,
- .dcache_sets = 0x80,
- .icache_block_size = 0x20,
- .dcache_block_size = 0x20,
- .tlb_sets = 0x40,
- .tlb_size = 0x80,
- .initfn = cpu_g4_init,
+},
These numbers are all correct (I checked against the manual).
Should there be something for L2 as well?
Segher
On Jan 20, 2018, at 10:51 AM, Segher Boessenkool segher@kernel.crashing.org wrote:
On Sat, Jan 20, 2018 at 09:38:21AM -0500, Jd Lyons via OpenBIOS wrote:
This patch should get all 7447a cpus working with openbios, needs a corresponding patch to Qemu-ppc for the v1.5
diff --git a/arch/ppc/qemu/init.c b/arch/ppc/qemu/init.c index 5ce080c..09b2db4 100644 --- a/arch/ppc/qemu/init.c +++ b/arch/ppc/qemu/init.c @@ -550,6 +550,18 @@ static const struct cpudef ppc_defs[] = { .tlb_size = 0x80, .initfn = cpu_g4_init, },
- .iu_version = 0x80030000,
- .name = "PowerPC,G4",
- .icache_size = 0x8000,
- .dcache_size = 0x8000,
- .icache_sets = 0x80,
- .dcache_sets = 0x80,
- .icache_block_size = 0x20,
- .dcache_block_size = 0x20,
- .tlb_sets = 0x40,
- .tlb_size = 0x80,
- .initfn = cpu_g4_init,
+},
These numbers are all correct (I checked against the manual).
Should there be something for L2 as well?
I was going to look into that, I’m installing Debian in my guest on my PowerBook6,8 to see how things are working. I’m interested to see what /proc/cpuinfo returns on the guest with -enable-kvm -cpu host.
I’m not sure Openbios supports L2/3 caches, yet, but that doesn’t prevent the guest from enabling them. On the Mac OS side there were plenty of utilities for enabling caches, I think there was some software for it for Linux too, but likely that is built into the kernel now, if not it shouldn’t be too hard to enable it at the OS level. I’ll have a Quicksilver in a week or two with dual 1.0 Ghz 7450’s. As those have L3 caches and the speed benefit of them can be massive, I’ll make sure there is some way to enable them in a guest.
As far as emulation of caches, I’m not real sure how that works, I’ll look at it, as time permits.
Segher
-- OpenBIOS http://openbios.org/ http://openbios.org/ Mailinglist: http://lists.openbios.org/mailman/listinfo http://lists.openbios.org/mailman/listinfo Free your System - May the Forth be with you
On 20/01/18 14:38, Jd Lyons via OpenBIOS wrote:
This patch should get all 7447a cpus working with openbios, needs a corresponding patch to Qemu-ppc for the v1.5
diff --git a/arch/ppc/qemu/init.c b/arch/ppc/qemu/init.c index 5ce080c..09b2db4 100644 --- a/arch/ppc/qemu/init.c +++ b/arch/ppc/qemu/init.c @@ -550,6 +550,18 @@ static const struct cpudef ppc_defs[] = { .tlb_size = 0x80, .initfn = cpu_g4_init, },
- .iu_version = 0x80030000,
- .name = "PowerPC,G4",
- .icache_size = 0x8000,
- .dcache_size = 0x8000,
- .icache_sets = 0x80,
- .dcache_sets = 0x80,
- .icache_block_size = 0x20,
- .dcache_block_size = 0x20,
- .tlb_sets = 0x40,
- .tlb_size = 0x80,
- .initfn = cpu_g4_init,
+}, { .iu_version = 0x00390000, .name = "PowerPC,970",
The basic patch looks fine, although a subject prefix with "ppc: " should be used. I can also see some whitespace errors, although I'm not sure if these are introduced by your email client or not?
If you are unsure about suitable commit messages then do have a look at the existing history (also available online at https://git.qemu.org/?p=openbios.git;a=summary) for inspiration.
ATB,
Mark.
On 20/01/18 15:51, Segher Boessenkool wrote:
On Sat, Jan 20, 2018 at 09:38:21AM -0500, Jd Lyons via OpenBIOS wrote:
This patch should get all 7447a cpus working with openbios, needs a corresponding patch to Qemu-ppc for the v1.5
diff --git a/arch/ppc/qemu/init.c b/arch/ppc/qemu/init.c index 5ce080c..09b2db4 100644 --- a/arch/ppc/qemu/init.c +++ b/arch/ppc/qemu/init.c @@ -550,6 +550,18 @@ static const struct cpudef ppc_defs[] = { .tlb_size = 0x80, .initfn = cpu_g4_init, },
- .iu_version = 0x80030000,
- .name = "PowerPC,G4",
- .icache_size = 0x8000,
- .dcache_size = 0x8000,
- .icache_sets = 0x80,
- .dcache_sets = 0x80,
- .icache_block_size = 0x20,
- .dcache_block_size = 0x20,
- .tlb_sets = 0x40,
- .tlb_size = 0x80,
- .initfn = cpu_g4_init,
+},
These numbers are all correct (I checked against the manual).
Should there be something for L2 as well?
Good question - I suspect you're the best person to know here ;) Could not having the L2 properties cause strange behaviour, or will the guest OS carry on fine without them present? (I presume this isn't a NACK?)
ATB,
Mark.
On Sun, Jan 21, 2018 at 09:29:18AM +0000, Mark Cave-Ayland wrote:
On 20/01/18 15:51, Segher Boessenkool wrote:
On Sat, Jan 20, 2018 at 09:38:21AM -0500, Jd Lyons via OpenBIOS wrote:
--- a/arch/ppc/qemu/init.c +++ b/arch/ppc/qemu/init.c @@ -550,6 +550,18 @@ static const struct cpudef ppc_defs[] = { .tlb_size = 0x80, .initfn = cpu_g4_init, },
- .iu_version = 0x80030000,
- .name = "PowerPC,G4",
- .icache_size = 0x8000,
- .dcache_size = 0x8000,
- .icache_sets = 0x80,
- .dcache_sets = 0x80,
- .icache_block_size = 0x20,
- .dcache_block_size = 0x20,
- .tlb_sets = 0x40,
- .tlb_size = 0x80,
- .initfn = cpu_g4_init,
+},
These numbers are all correct (I checked against the manual).
Should there be something for L2 as well?
Good question - I suspect you're the best person to know here ;) Could not having the L2 properties cause strange behaviour, or will the guest OS carry on fine without them present? (I presume this isn't a NACK?)
This isn't a NAK; the other CPUs are like that as well in the openbios code I guess, and some of those have L2.
L2 is described in a node _under_ the "cpu" node in the device tree. Linux does not care if it is absent; I don't know about the other OSes though. If everything works it is not a pressing concern ;-)
Segher
On Jan 21, 2018, at 7:36 AM, Segher Boessenkool segher@kernel.crashing.org wrote:
On Sun, Jan 21, 2018 at 09:29:18AM +0000, Mark Cave-Ayland wrote:
On 20/01/18 15:51, Segher Boessenkool wrote:
On Sat, Jan 20, 2018 at 09:38:21AM -0500, Jd Lyons via OpenBIOS wrote:
--- a/arch/ppc/qemu/init.c +++ b/arch/ppc/qemu/init.c @@ -550,6 +550,18 @@ static const struct cpudef ppc_defs[] = { .tlb_size = 0x80, .initfn = cpu_g4_init, },
- .iu_version = 0x80030000,
- .name = "PowerPC,G4",
- .icache_size = 0x8000,
- .dcache_size = 0x8000,
- .icache_sets = 0x80,
- .dcache_sets = 0x80,
- .icache_block_size = 0x20,
- .dcache_block_size = 0x20,
- .tlb_sets = 0x40,
- .tlb_size = 0x80,
- .initfn = cpu_g4_init,
+},
These numbers are all correct (I checked against the manual).
Should there be something for L2 as well?
Good question - I suspect you're the best person to know here ;) Could not having the L2 properties cause strange behaviour, or will the guest OS carry on fine without them present? (I presume this isn't a NACK?)
This isn't a NAK; the other CPUs are like that as well in the openbios code I guess, and some of those have L2.
L2 is described in a node _under_ the "cpu" node in the device tree. Linux does not care if it is absent; I don't know about the other OSes though. If everything works it is not a pressing concern ;-)
After installing Linux in the guest, no L2 cache is active, and you can really fell it as to how responsive the system is.
I don’t know if the L2 cache is emulated on the PPC CPU’s that Qemu support?
If it is, then we should add this to openbios, but if it isn’t, I don’t know if that would break things?
On a side note, investigating why BootX hangs when I try to boot OS X with -cpu host, it seem the bless command will create BootX and you can pass it a file to create a costume BootX from.
If anyone knows anything about this feature, please speak up.
Steve Smith created a version of BootX to get Mac OS Sever v1.2 booting in Qemu-PPC, and it has some logging features, but it doesn’t work with kernels passed OS X 10.1. I tried to boot the 10.1 CD with it, with -cpu host, but it doesn’t give me any useful info.
https://github.com/steventroughtonsmith/bootx
bless —help --bootinfo [file] Use <file> to create a "BootX" file in the blessed dir
Mark, I’ll look over the info you posted and see if I can figure the proper way to submit a patch. I’m having trouble with my email clients on the old PPC machines, and yahoo doesn’t want to play nice.
My patch to Qemu is incomplete, seems the cpu I added doesn’t get added to the cpu info list when you invoke —cpu help, and you can’t specify it with -cpu 7447a_v1.5.
It’s a bit of a leaning curve for me, but I’ll figure all the proper ways to do this stuff.
Hoping we can add some more features to openbios and qemu-ppc as I’ll have quite a few old Macs to help.
Segher
-- OpenBIOS http://openbios.org/ Mailinglist: http://lists.openbios.org/mailman/listinfo Free your System - May the Forth be with you
-
Jd Lyons -
Mark Cave-Ayland -
Segher Boessenkool