On Sat, Jan 20, 2018 at 09:38:21AM -0500, Jd Lyons via OpenBIOS wrote:This patch should get all 7447a cpus working with openbios, needs a corresponding patch to Qemu-ppc for the v1.5
diff --git a/arch/ppc/qemu/init.c b/arch/ppc/qemu/init.c
index 5ce080c..09b2db4 100644
--- a/arch/ppc/qemu/init.c
+++ b/arch/ppc/qemu/init.c
@@ -550,6 +550,18 @@ static const struct cpudef ppc_defs[] = {
.tlb_size = 0x80,
.initfn = cpu_g4_init,
},
+ .iu_version = 0x80030000,
+ .name = "PowerPC,G4",
+ .icache_size = 0x8000,
+ .dcache_size = 0x8000,
+ .icache_sets = 0x80,
+ .dcache_sets = 0x80,
+ .icache_block_size = 0x20,
+ .dcache_block_size = 0x20,
+ .tlb_sets = 0x40,
+ .tlb_size = 0x80,
+ .initfn = cpu_g4_init,
+},
These numbers are all correct (I checked against the manual).Should there be something for L2 as well?
I was going to look into that, I’m installing Debian in my guest on my PowerBook6,8 to see how things are working. I’m interested to see what /proc/cpuinfo returns on the guest with -enable-kvm -cpu host.
I’m not sure Openbios supports L2/3 caches, yet, but that doesn’t prevent the guest from enabling them. On the Mac OS side there were plenty of utilities for enabling caches, I think there was some software for it for Linux too, but likely that is built into the kernel now, if not it shouldn’t be too hard to enable it at the OS level. I’ll have a Quicksilver in a week or two with dual 1.0 Ghz 7450’s. As those have L3 caches and the speed benefit of them can be massive, I’ll make sure there is some way to enable them in a guest.
As far as emulation of caches, I’m not real sure how that works, I’ll look at it, as time permits.