On 20/02/11 15:27, Mark Cave-Ayland wrote:
So it seems to be this setting of the PSR register which is causing the fatal trap.
Some more hacking around with gdb on qemu shows that actually in fact, the spurious interrupts being generated are not related to the DMA transfers but have exception_index 0x1f which translates to IRQ 15.
Searching on the internet seems to suggest that IRQ 15 is used for distributing interrupts on multi-processor systems - so perhaps it is related to OpenBIOS' SMP setup? With a conditional breakpoint, I can see that they only start appearing upon activation of the first DMA transfer initiated by the Solaris kernel.