The section describing the various options of the internal programmer has grown out of proportions and it has become confusing. This patch adds some headlines to devide the unrelated topics a bit. --- I would also like to make the syntax examples non-bold so that the headlines stick out more (TBH i don't see the point in making the examples stick out that much by making them bold and reside on their own line at all).
The dummy programmer probably needs something similar rather sooner than later.
Opinions and other format command suggestions are very welcome!
Signed-off-by: Stefan Tauner stefan.tauner@student.tuwien.ac.at --- flashrom.8 | 11 +++++++++++ 1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/flashrom.8 b/flashrom.8 index 9ffd788..367a0a9 100644 --- a/flashrom.8 +++ b/flashrom.8 @@ -225,6 +225,9 @@ programmers use a key/value interface in which the key and value is separated by an equal sign and different pairs are separated by a comma or a colon. .TP .BR "internal " programmer +.sp +.B * Board Enables +.sp Some mainboards require to run mainboard specific code to enable flash erase and write support (and probe support on old systems with parallel flash). The mainboard brand and model (if it requires specific code) is usually @@ -275,6 +278,8 @@ has been written because it is known that writing/erasing without the board enable is going to fail. In any case (success or failure), please report to the flashrom mailing list, see below. .sp +.B * Coreboot +.sp On systems running coreboot, flashrom checks whether the desired image matches your mainboard. This needs some special board ID to be present in the image. If flashrom detects that the image you want to write and the current board @@ -282,6 +287,8 @@ do not match, it will refuse to write the image unless you specify .sp .B " flashrom -p internal:boardmismatch=force" .sp +.B * ITE IT87 Super I/O +.sp If your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus translation, flashrom should autodetect that configuration. If you want to set the I/O base port of the IT87 series SPI controller manually instead of @@ -295,6 +302,8 @@ is the I/O port number (must be a multiple of 8). In the unlikely case flashrom doesn't detect an active IT87 LPC<->SPI bridge, please send a bug report so we can diagnose the problem. .sp +.B * Intel chipsets +.sp If you have an Intel chipset with an ICH8 or later southbridge with SPI flash attached, and if a valid descriptor was written to it (e.g. by the vendor), the chipset provides an alternative way to access the flash chip(s) named @@ -332,6 +341,8 @@ settings. The default value for ICH7 is given in the example below. Example: .B "flashrom -p internal:fwh_idsel=0x001122334567" .sp +.B * Laptops +.sp Using flashrom on laptops is dangerous and may easily make your hardware unusable (see also the .B BUGS
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Stefan Tauner