On Thu, 25 Jul 2013 20:23:32 +0200 san san@plusnet.pl wrote:
Just uploaded lspci -nn here: http://e-san.info/Flashrom-P4/lspci-nn.txt How to lower GPIO by hand (before patch)?
Ah I forgot... I need one verbose flag too for the final patch, so that we see the subsystem IDs too, sorry. So it should have been lspci -nnv.
I have prepared a preliminary patch that should at least verify if the reverse engineering is correct, see the attachment.
You can also set this somehow with pciset as you know, I am just not entirely sure about the exact commands. you would need to get the gpiobase first with setpci -s 00:1f.0 58.l (only bits 6-15 are the base address see datasheet) and then fetch the old value with setpci -s 0:1f.0 gpiobase+0x0c and set it with setpci -s 0:1f.0 gpiobase+0x0c=...
I would rather just try the patch. :)
Sometimes there happen errors while reverse engineering the code so it is possible that you actually need to raise the pin instead or that the pin number is off by one. If you are a bit into programming then I am sure you can figure out how to refine the patch if necessary, but we can help you too of course.
On Thu, 25 Jul 2013 21:31:01 +0200 Stefan Tauner stefan.tauner@student.tuwien.ac.at wrote:
You can also set this somehow with pciset as you know, I am just not entirely sure about the exact commands. you would need to get the gpiobase first with setpci -s 00:1f.0 58.l (only bits 6-15 are the base address see datasheet) and then fetch the old value with setpci -s 0:1f.0 gpiobase+0x0c and set it with setpci -s 0:1f.0 gpiobase+0x0c=...
Actually this can't work out (thanks to Kyösti for pointing that out). Because the gpiobase address is in the separated i/o address space of the cpu. "The control for the general purpose I/O signals is handled through a separate 64-byte I/O space." I am not aware of any distributed binaries that work similar to setpci but in the i/o space, so you would need to program your own... like the one described here: http://flashrom.org/Board_Enable
Yeah, i tried to understand it about three times...
I'll try again, tommorow. Only thing i found is
=== [code] === 0262420 $ @ A W D F L A S H < e ? e 211 e 0262440 337 e 342 e 370 e 024 f G f 0 f 340 e 341 e 0262460 023 \0 D d 243 f \0 \0 \0 \0 262 \0 2 333 313 f 0262500 ` 271 N 370 350 \r 001 \f 001 350 $ 001 263 023 212 313 0262520 200 341 \a 267 001 322 347 366 327 212 313 300 351 003 200 301 0262540 214 350 e \0 " 307 350 k \0 263 023 212 313 200 341 \a 0262560 267 001 322 347 366 327 212 313 300 351 003 200 301 214 350 H 0262600 \0 " 307 350 N \0 f a 313 f ` 271 N 370 350 303 0262620 \0 $ 376 350 332 \0 263 023 212 313 200 341 \a 267 001 322 0262640 347 212 313 300 351 003 200 301 214 350 035 \0 \n 307 350 # 0262660 \0 f a 313 f Q f P 271 A 370 350 226 \0 017 266 0262700 320 301 342 \b f X f Y 303 R 350 347 377 212 321 354 0262720 346 353 Z 303 R 350 334 377 212 321 356 346 353 Z 303 313 0262740 313 313 ` 036 272 \0 220 216 332 3 366 271 \0 200 363 255 0262760 200 356 020 u 362 037 a 313 271 220 \0 350 V \0 $ 017 === [/code] ===
but have no idea how to use it... best regards.
2013/7/25 Stefan Tauner stefan.tauner@student.tuwien.ac.at
On Thu, 25 Jul 2013 21:31:01 +0200 Stefan Tauner stefan.tauner@student.tuwien.ac.at wrote:
You can also set this somehow with pciset as you know, I am just not entirely sure about the exact commands. you would need to get the gpiobase first with setpci -s 00:1f.0 58.l (only bits 6-15 are the base address see datasheet) and then fetch the old value with setpci -s 0:1f.0 gpiobase+0x0c and set it with setpci -s 0:1f.0 gpiobase+0x0c=...
Actually this can't work out (thanks to Kyösti for pointing that out). Because the gpiobase address is in the separated i/o address space of the cpu. "The control for the general purpose I/O signals is handled through a separate 64-byte I/O space." I am not aware of any distributed binaries that work similar to setpci but in the i/o space, so you would need to program your own... like the one described here: http://flashrom.org/Board_Enable
-- Kind regards/Mit freundlichen Grüßen, Stefan Tauner
I've tried to do reverse program, but it is not for me...
I can share with someone my login, password and address to connect to this PC via ssh to solve this problem.
Anyone?
2013/7/25 Stefan Tauner stefan.tauner@student.tuwien.ac.at
On Thu, 25 Jul 2013 21:31:01 +0200 Stefan Tauner stefan.tauner@student.tuwien.ac.at wrote:
You can also set this somehow with pciset as you know, I am just not entirely sure about the exact commands. you would need to get the gpiobase first with setpci -s 00:1f.0 58.l (only bits 6-15 are the base address see datasheet) and then fetch the old value with setpci -s 0:1f.0 gpiobase+0x0c and set it with setpci -s 0:1f.0 gpiobase+0x0c=...
Actually this can't work out (thanks to Kyösti for pointing that out). Because the gpiobase address is in the separated i/o address space of the cpu. "The control for the general purpose I/O signals is handled through a separate 64-byte I/O space." I am not aware of any distributed binaries that work similar to setpci but in the i/o space, so you would need to program your own... like the one described here: http://flashrom.org/Board_Enable
-- Kind regards/Mit freundlichen Grüßen, Stefan Tauner
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san -
Stefan Tauner