[PATCH] ICH6-ICH10 flash decode debugging

[Carl-Daniel Hailfinger]

Add ICH6,ICH7,ICH8,ICH9,ICH10 FWH IDSEL settings and flash decode
settings to the debug output. This can help debug cases where the BIOS
does not set up a correct flash decode for the given flash size.
The Intel docs state that the decode applies to FWH and SPI flash.

Signed-off-by: Carl-Daniel Hailfinger

Index: flashrom-ich6_fwh_idsel_debug/chipset_enable.c
===================================================================
--- flashrom-ich6_fwh_idsel_debug/chipset_enable.c	(Revision 667)
+++ flashrom-ich6_fwh_idsel_debug/chipset_enable.c	(Arbeitskopie)
@@ -192,11 +192,43 @@

static int enable_flash_ich_4e(struct pci_dev *dev, const char *name)
 {
+	/*
+	 * Note: ICH5 has registers similar to FWH_SEL1, FWH_SEL2 and
+	 * FWH_DEC_EN1, but they are called FB_SEL1, FB_SEL2, FB_DEC_EN1 and
+	 * FB_DEC_EN2.
+	 */
    return enable_flash_ich(dev, name, 0x4e);
 }

static int enable_flash_ich_dc(struct pci_dev *dev, const char *name)
 {
+	uint32_t fwh_conf;
+	int i;
+
+	/* Ignore all legacy ranges below 1 MB. */
+	/* FWH_SEL1 */
+	fwh_conf = pci_read_long(dev, 0xd0);
+	for (i = 7; i >= 0; i--)
+		printf_debug("0xff%02x/0xff%02x FWH IDSEL: 0x%x, ",
+			     i * 0x8 + 0xc0, i * 0x8 + 0x80,
+			     (fwh_conf >> (i * 4)) & 0xf);
+	/* FWH_SEL2 */
+	fwh_conf = pci_read_word(dev, 0xd4);
+	for (i = 3; i >= 0; i--)
+		printf_debug("0xff%02x/0xff%02x FWH IDSEL: 0x%x, ",
+			     i * 0x10 + 0x40, i * 0x10,
+			     (fwh_conf >> (i * 4)) & 0xf);
+	/* FWH_DEC_EN1 */
+	fwh_conf = pci_read_word(dev, 0xd8);
+	for (i = 7; i >= 0; i--)
+		printf_debug("0xff%02x/0xff%02x FWH decode %sabled, ",
+			     i * 0x8 + 0xc0, i * 0x8 + 0x80,
+			     (fwh_conf >> (i + 0x8)) & 0x1 ? "en" : "dis");
+	for (i = 3; i >= 0; i--)
+		printf_debug("0xff%02x/0xff%02x FWH decode %sabled, ",
+			     i * 0x10 + 0x40, i * 0x10,
+			     (fwh_conf >> i) & 0x1 ? "en" : "dis");
+	printf_debug("\n");
    return enable_flash_ich(dev, name, 0xdc);
 }

[Carl-Daniel Hailfinger]

Hi Ron,

just in case gmail still screws up inline patches, here's a link to the
download for this patch:
http://patchwork.coreboot.org/patch/77/raw/

On 28.07.2009 01:25, Carl-Daniel Hailfinger wrote:
> Add ICH6,ICH7,ICH8,ICH9,ICH10 FWH IDSEL settings and flash decode
> settings to the debug output. This can help debug cases where the BIOS
> does not set up a correct flash decode for the given flash size.
> The Intel docs state that the decode applies to FWH and SPI flash.

Regards,
Car-Daniel

[Stefan Reinauer]

On 7/28/09 1:25 AM, Carl-Daniel Hailfinger wrote:
> for (i = 7; i >= 0; i--)
> printf_debug("0xff%02x/0xff%02x FWH decode %sabled, ",
> 	     i * 0x8 + 0xc0, i * 0x8 + 0x80,
> 	     (fwh_conf >> (i + 0x8)) & 0x1 ? "en" : "dis");
> for (i = 3; i >= 0; i--)
> printf_debug("0xff%02x/0xff%02x FWH decode %sabled, ",
> 	     i * 0x10 + 0x40, i * 0x10,
> 	     (fwh_conf >> i) & 0x1 ? "en" : "dis");

I suggest to write this as

printf_debug("\n0xff%02x0000/0xff%02x0000 FWH decode ...

otherwise it's very hard to see something from the patch

Stefan