Hi Rudolf,
I wanted to follow up with an issue on my AMD chipset. Here is my original question: http://www.flashrom.org/pipermail/flashrom/2013-April/010924.html. Basically the IMC bit in the LPC PCI config register at offset 0x40 is not set, but flashrom still finds something else is accessing the flash chip and decides to bail out.
I was led to your patch so I gave it a try. I removed the IMC bit check in your patch but still the IMC seems to be indeed inactive, since mbox_port read 0. Also I noticed you wrote 0x5a to enter conf mode and 0xa5 to exit conf mode. According to the datasheet 0x55 and 0xaa should be written instead. I made that change but it didn't help either.
Can someone think of any other possible things that's accessing the chip?
Thanks, Wei
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Wei Hu