Abit KN9 board enable method, lspci -nnv

[Georg Sauthoff]

Hi,

as discussed on IRC (#flashrom) today, current flashrom trunk fails
writing the flash chip on an Abit KN9 Ultra/SLI board. Reading works, though.

The failure message is:

flashrom/trunk/flashrom --programmer internal -c Pm49FL004 -w M520A_23.BIN 
    flashrom v0.9.8-rc1-r1885 on Linux 3.2.0-4-amd64 (x86_64)
    flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OK.
    Found chipset "NVIDIA MCP55".
    Enabling flash write... OK.
    Found PMC flash chip "Pm49FL004" (512 kB, LPC, FWH) mapped at physical address 0x00000000fff80000.
    ===
    This flash part has status UNTESTED for operations: ERASE WRITE
    The test status of this chip may have been updated in the latest development
    version of flashrom. If you are running the latest development version,
    please email a report to [e-mail] if any of the above operations
    work correctly for you with this flash chip. Please include the flashrom log
    file for all operations you tested (see the man page for details), and mention
    which mainboard or programmer you tested in the subject line.
    Thanks for your help!
    Reading old flash chip contents... done.
    Erasing and writing flash chip... FAILED at 0x00000000! Expected=0xff, Found=0x49, failed byte count from 0x00000000-0x00000fff: 0x730
    ERASE FAILED!
    Reading current flash chip contents... done. Looking for another erase function.
    FAILED at 0x00000000! Expected=0xff, Found=0x49, failed byte count from 0x00000000-0x0000ffff: 0x730
    ERASE FAILED!
    Reading current flash chip contents... done. Looking for another erase function.
    FAILED at 0x00000000! Expected=0xff, Found=0x49, failed byte count from 0x00000000-0x0007ffff: 0x57f07
    ERASE FAILED!
    Looking for another erase function.
    No usable erase functions left.
    FAILED!
    Uh oh. Erase/write failed. Checking if anything has changed.
    Reading current flash chip contents... done.
    Good, writing to the flash chip apparently didn't do anything.
    This means we have to add special support for your board, programmer or flash
    chip. Please report this on IRC at chat.freenode.net (channel #flashrom) or
    mail [e-mail], thanks!

It fails because the chip is write protected, by default.

It turns out that the board enable method for the Abit KN9 Ultra is the
same as for the Abit KN8 Ultra - which is already included in flashrom
(nvidia_mcp_gpio2_lower()).

That means that I could successfully flash that chip multiple times with
flashrom using that board enable code.

For illustration, I include the ghetto-style patch I've used:

@@ -2313,7 +2313,7 @@
            {0x8086, 0x24d3, 0x147b, 0x1014,  0x8086, 0x2578, 0x147b, 0x1014, NULL,         NULL, NULL,           P3, "abit",        "IC7",                   0,   NT, intel_ich_gpio23_raise},
            {0x8086, 0x2930, 0x147b, 0x1084,  0x11ab, 0x4364, 0x147b, 0x1084, NULL,         NULL, NULL,           P3, "abit",        "IP35",                  0,   OK, intel_ich_gpio16_raise},
            {0x8086, 0x2930, 0x147b, 0x1083,  0x10ec, 0x8167, 0x147b, 0x1083, NULL,         NULL, NULL,           P3, "abit",        "IP35 Pro",              0,   OK, intel_ich_gpio16_raise},
    -       {0x10de, 0x0050, 0x147b, 0x1c1a,  0x10de, 0x0052, 0x147b, 0x1c1a, NULL,         NULL, NULL,           P3, "abit",        "KN8 Ultra",             0,   NT, nvidia_mcp_gpio2_lower},
    +       {0x10de, 0x0050, 0x147b, 0x1c1a,  0x10de, 0x0052, 0x147b, 0x1c1a, NULL,         NULL, NULL,           P3, "abit",        "KN8 Ultra",             0,   OK, nvidia_mcp_gpio2_lower},
            {0x10de, 0x01e0, 0x147b, 0x1c00,  0x10de, 0x0060, 0x147B, 0x1c00, NULL,         NULL, NULL,           P3, "abit",        "NF7-S",                 0,   OK, nvidia_mcp_gpio8_raise},
            {0x10de, 0x02f0, 0x147b, 0x1c26,  0x10de, 0x0260, 0x147b, 0x1c26, NULL,         NULL, NULL,           P3, "abit",        "NF-M2 nView",           0,   OK, nvidia_mcp_gpio4_lower},
            {0x1106, 0x0691,      0,      0,  0x1106, 0x3057,      0,      0, "(VA6)$",     NULL, NULL,           P3, "abit",        "VA6",                   0,   OK, via_apollo_gpo4_lower},
    @@ -2578,6 +2578,8 @@
      */
     const static struct board_match *board_match_pci_ids(enum board_match_phase phase)
     {
    +  return board_matches + 7;
    +
            const struct board_match *board = board_matches;

for (; board->vendor_name; board++) {

Of course, for inclusion, proper PCI ids should be configured for the Abit KN9
Ultra board via that table.

For that, the `lspci -nnv` output is attached.

Best regards
Georg

[Stefan Tauner]

On Sat, 21 Feb 2015 20:31:37 +0100
Georg Sauthoff  wrote:
> […]
>
> Of course, for inclusion, proper PCI ids should be configured for the Abit KN9
> Ultra board via that table.
>
> For that, the `lspci -nnv` output is attached.

Just for the record: I have added an appropriate change to my
tested_stuff branch, which will end up in the 0.9.8 release.