Hi Brishchik, This is actually the management engine at play and is a known issue.
You'll have to ask Intel about this logic to judge whether it's a feature or a bug...
On Wed, Aug 31, 2016 at 7:49 AM, Brishchik Gupta email@example.com wrote:
Device: Acer C720-3605 Chromebook (Haswell) with Winbond W25Q64 8MB firmware flash
Description of issue --- The following behavior is observed:
- If write protect is disabled (either in hardware i.e. screw removed, or
in software i.e. status.srp0 == 0 == status.srp1, or in both hardware and software) AND there is a non-null write protect range (set by status register bits BP0/BP1/BP2/TB/SEC), then upon power cycled reboot, the status registers get completely cleared (to 0x0000).
- If write protect is disabled in hardware but not in software and the
write protect range is null (so status registers == 0x0080), then a power cycled reboot preserves the status registers (i.e. the value is still 0x0080 after reboot).
Is the above behavior a feature or a bug?
I can post logs (e.g. outputs of "flashrom --wp-status") if necessary.
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