>From 578f6489f6b71702a1b038cfe61cd2149b49ebcb Mon Sep 17 00:00:00 2001
From: Tadas Slotkus <devtadas@gmail.com>
Date: Wed, 17 Aug 2011 16:14:28 +0300
Subject: [carFl mem 19/21] Move max_rom_decode, programmer_may_... to globals

Move max_rom_decode, programmer_may_write to globals.
Move decode_sizes struct to flash.h

Signed-off-by: Tadas Slotkus <devtadas@gmail.com>
---
 board_enable.c   |   10 +++++-----
 chipset_enable.c |   12 ++++++------
 flash.h          |   16 ++++++++++++++++
 flashrom.c       |   31 +++++++++++--------------------
 programmer.h     |    8 --------
 sb600spi.c       |    2 +-
 wbsio_spi.c      |    2 +-
 7 files changed, 40 insertions(+), 41 deletions(-)

diff --git a/board_enable.c b/board_enable.c
index 90a4d1d..708f5d4 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -438,7 +438,7 @@ int it8705f_write_enable(uint8_t port)
 		msg_pdbg("Enabling IT8705F flash ROM interface write.\n");
 		if (tmp & 0x02) {
 			/* The data sheet contradicts itself about max size. */
-			max_rom_decode.parallel = 1024 * 1024;
+			g->max_rom_decode.parallel = 1024 * 1024;
 			msg_pinfo("IT8705F with very unusual settings. Please "
 				  "send the output of \"flashrom -V\" to \n"
 				  "flashrom@flashrom.org with "
@@ -447,9 +447,9 @@ int it8705f_write_enable(uint8_t port)
 				  "support for your Super I/O. Thanks.\n");
 			ret = 1;
 		} else if (tmp & 0x08) {
-			max_rom_decode.parallel = 512 * 1024;
+			g->max_rom_decode.parallel = 512 * 1024;
 		} else {
-			max_rom_decode.parallel = 256 * 1024;
+			g->max_rom_decode.parallel = 256 * 1024;
 		}
 		/* Safety checks. The data sheet is unclear here: Segments 1+3
 		 * overlap, no segment seems to cover top - 1MB to top - 512kB.
@@ -493,7 +493,7 @@ int it8705f_write_enable(uint8_t port)
 			ret = 1;
 		}
 		msg_pdbg("Maximum IT8705F parallel flash decode size is %u.\n",
-			max_rom_decode.parallel);
+			g->max_rom_decode.parallel);
 		if (ret) {
 			msg_pinfo("Not enabling IT8705F flash write.\n");
 		} else {
@@ -2279,7 +2279,7 @@ int board_flash_enable(const char *vendor, const char *part)
 
 	if (board) {
 		if (board->max_rom_decode_parallel)
-			max_rom_decode.parallel =
+			g->max_rom_decode.parallel =
 				board->max_rom_decode_parallel * 1024;
 
 		if (board->enable != NULL) {
diff --git a/chipset_enable.c b/chipset_enable.c
index 9f15ade..20d5146 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -416,8 +416,8 @@ idsel_garbage_out:
 			contiguous = 0;
 		}
 	}
-	max_rom_decode.fwh = min(max_decode_fwh_idsel, max_decode_fwh_decode);
-	msg_pdbg("\nMaximum FWH chip size: 0x%x bytes", max_rom_decode.fwh);
+	g->max_rom_decode.fwh = min(max_decode_fwh_idsel, max_decode_fwh_decode);
+	msg_pdbg("\nMaximum FWH chip size: 0x%x bytes", g->max_rom_decode.fwh);
 
 	/* If we're called by enable_flash_ich_dc_spi, it will override
 	 * buses_supported anyway.
@@ -617,18 +617,18 @@ static int enable_flash_cs5530(struct pci_dev *dev, const char *name)
 	reg8 = pci_read_byte(dev, CS5530_RESET_CONTROL_REG);
 	if (reg8 & CS5530_ISA_MASTER) {
 		/* We have A0-A23 available. */
-		max_rom_decode.parallel = 16 * 1024 * 1024;
+		g->max_rom_decode.parallel = 16 * 1024 * 1024;
 	} else {
 		reg8 = pci_read_byte(dev, CS5530_USB_SHADOW_REG);
 		if (reg8 & CS5530_ENABLE_SA2320) {
 			/* We have A0-19, A20-A23 available. */
-			max_rom_decode.parallel = 16 * 1024 * 1024;
+			g->max_rom_decode.parallel = 16 * 1024 * 1024;
 		} else if (reg8 & CS5530_ENABLE_SA20) {
 			/* We have A0-19, A20 available. */
-			max_rom_decode.parallel = 2 * 1024 * 1024;
+			g->max_rom_decode.parallel = 2 * 1024 * 1024;
 		} else {
 			/* A20 and above are not active. */
-			max_rom_decode.parallel = 1024 * 1024;
+			g->max_rom_decode.parallel = 1024 * 1024;
 		}
 	}
 
diff --git a/flash.h b/flash.h
index 304db13..533dd1d 100644
--- a/flash.h
+++ b/flash.h
@@ -292,6 +292,13 @@ struct superio {
 	uint16_t model;
 };
 
+struct decode_sizes {
+	uint32_t parallel;
+	uint32_t lpc;
+	uint32_t fwh;
+	uint32_t spi;
+};
+
 struct globals {
 	/* Supported buses for the current programmer. */
 	enum chipbustype buses_supported;
@@ -311,6 +318,15 @@ struct globals {
 	struct superio superios[SUPERIO_MAX_COUNT];
 	int superio_count;
 
+	/*
+	 * Programmers supporting multiple buses can have differing size limits on
+	 * each bus. Store the limits for each bus in a common struct.
+	 */
+	struct decode_sizes max_rom_decode;
+
+	/* Is writing allowed with this programmer? */
+	int programmer_may_write;
+
 	/* If nonzero, used as the start address of bottom-aligned flash. */
 	unsigned long flashbase;
 
diff --git a/flashrom.c b/flashrom.c
index 252a6c3..c351b3d 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -112,15 +112,6 @@ static void init_globals(void)
 
 static char *programmer_param = NULL;
 
-/*
- * Programmers supporting multiple buses can have differing size limits on
- * each bus. Store the limits for each bus in a common struct.
- */
-struct decode_sizes max_rom_decode;
-
-/* Is writing allowed with this programmer? */
-int programmer_may_write;
-
 const struct programmer_entry programmer_table[] = {
 #if CONFIG_INTERNAL == 1
 	{
@@ -496,7 +487,7 @@ int programmer_init(char *param)
 	int ret;
 	/* Initialize all programmer specific data. */
 	/* Default to unlimited decode sizes. */
-	max_rom_decode = (const struct decode_sizes) {
+	g.max_rom_decode = (const struct decode_sizes) {
 		.parallel	= 0xffffffff,
 		.lpc		= 0xffffffff,
 		.fwh		= 0xffffffff,
@@ -508,7 +499,7 @@ int programmer_init(char *param)
 	/* Registering shutdown functions is now allowed. */
 	may_register_shutdown = 1;
 	/* Default to allowing writes. Broken programmers set this to 0. */
-	programmer_may_write = 1;
+	g.programmer_may_write = 1;
 
 	programmer_param = param;
 	msg_pdbg("Initializing %s programmer\n",
@@ -1070,37 +1061,37 @@ int check_max_decode(enum chipbustype buses, uint32_t size)
 {
 	int limitexceeded = 0;
 
-	if ((buses & BUS_PARALLEL) && (max_rom_decode.parallel < size)) {
+	if ((buses & BUS_PARALLEL) && (g.max_rom_decode.parallel < size)) {
 		limitexceeded++;
 		msg_pdbg("Chip size %u kB is bigger than supported "
 			 "size %u kB of chipset/board/programmer "
 			 "for %s interface, "
 			 "probe/read/erase/write may fail. ", size / 1024,
-			 max_rom_decode.parallel / 1024, "Parallel");
+			 g.max_rom_decode.parallel / 1024, "Parallel");
 	}
-	if ((buses & BUS_LPC) && (max_rom_decode.lpc < size)) {
+	if ((buses & BUS_LPC) && (g.max_rom_decode.lpc < size)) {
 		limitexceeded++;
 		msg_pdbg("Chip size %u kB is bigger than supported "
 			 "size %u kB of chipset/board/programmer "
 			 "for %s interface, "
 			 "probe/read/erase/write may fail. ", size / 1024,
-			 max_rom_decode.lpc / 1024, "LPC");
+			 g.max_rom_decode.lpc / 1024, "LPC");
 	}
-	if ((buses & BUS_FWH) && (max_rom_decode.fwh < size)) {
+	if ((buses & BUS_FWH) && (g.max_rom_decode.fwh < size)) {
 		limitexceeded++;
 		msg_pdbg("Chip size %u kB is bigger than supported "
 			 "size %u kB of chipset/board/programmer "
 			 "for %s interface, "
 			 "probe/read/erase/write may fail. ", size / 1024,
-			 max_rom_decode.fwh / 1024, "FWH");
+			 g.max_rom_decode.fwh / 1024, "FWH");
 	}
-	if ((buses & BUS_SPI) && (max_rom_decode.spi < size)) {
+	if ((buses & BUS_SPI) && (g.max_rom_decode.spi < size)) {
 		limitexceeded++;
 		msg_pdbg("Chip size %u kB is bigger than supported "
 			 "size %u kB of chipset/board/programmer "
 			 "for %s interface, "
 			 "probe/read/erase/write may fail. ", size / 1024,
-			 max_rom_decode.spi / 1024, "SPI");
+			 g.max_rom_decode.spi / 1024, "SPI");
 	}
 	if (!limitexceeded)
 		return 0;
@@ -1815,7 +1806,7 @@ int main(int argc, char *argv[])
  */
 int chip_safety_check(struct flashchip *flash, int force, int read_it, int write_it)
 {
-	if (!programmer_may_write && (write_it)) {
+	if (!g.programmer_may_write && (write_it)) {
 		msg_perr("Write/erase is not working yet on your programmer in "
 			 "its current configuration.\n");
 		/* --force is the wrong approach, but it's the best we can do
diff --git a/programmer.h b/programmer.h
index a31f3fd..a20e378 100644
--- a/programmer.h
+++ b/programmer.h
@@ -423,14 +423,6 @@ int dediprog_init(void);
 #endif
 
 /* flashrom.c */
-struct decode_sizes {
-	uint32_t parallel;
-	uint32_t lpc;
-	uint32_t fwh;
-	uint32_t spi;
-};
-extern struct decode_sizes max_rom_decode;
-extern int programmer_may_write;
 void check_chip_supported(const struct flashchip *flash);
 int check_max_decode(enum chipbustype buses, uint32_t size);
 char *extract_programmer_param(const char *param_name);
diff --git a/sb600spi.c b/sb600spi.c
index ea7a8c2..dec4dd8 100644
--- a/sb600spi.c
+++ b/sb600spi.c
@@ -315,7 +315,7 @@ int sb600_probe_spi(struct pci_dev *dev)
 		/* FIXME: Should we only disable SPI writes, or will the lockup
 		 * affect LPC/FWH chips as well?
 		 */
-		programmer_may_write = 0;
+		g->programmer_may_write = 0;
 	}
 
 	/* Bring the FIFO to a clean state. */
diff --git a/wbsio_spi.c b/wbsio_spi.c
index b300746..30c89cc 100644
--- a/wbsio_spi.c
+++ b/wbsio_spi.c
@@ -92,7 +92,7 @@ int wbsio_check_for_spi(void)
 	register_spi_programmer(&spi_programmer_wbsio);
 	msg_pdbg("%s: Winbond saved on 4 register bits so max chip size is "
 		 "1024 kB!\n", __func__);
-	max_rom_decode.spi = 1024 * 1024;
+	g->max_rom_decode.spi = 1024 * 1024;
 
 	return 0;
 }
-- 
1.7.6

