Datasheet: http://www.datasheetsite.com/extpdf.php?q=http%3A%2F%2Fdownload.intel.com%2Fdesign%2Fflcomp%2Fsupport%2Fspecupdt%2F29779607.pdf diff --git a/flashchips.c b/flashchips.c index 70954b8..33751a1 100644 --- a/flashchips.c +++ b/flashchips.c @@ -2375,26 +2375,49 @@ struct flashchip flashchips[] = { {112 * 1024, 1}, {4 * 1024, 2}, {8 * 1024, 1}, }, .block_erase = erase_82802ab_block, }, }, .write = NULL, .read = read_memmapped, }, { .vendor = "Intel", + .name = "28F004S5", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = INTEL_ID, + .model_id = E_28F004S5, + .total_size = 512, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_82802ab, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = erase_82802ab_block, + }, + }, + .write = write_82802ab, + .read = read_memmapped, + }, + + { + .vendor = "Intel", .name = "82802AB", .bustype = CHIP_BUSTYPE_FWH, .manufacture_id = INTEL_ID, .model_id = I_82802AB, .total_size = 512, .page_size = 64 * 1024, .tested = TEST_OK_PRW, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine does not use probe_timing (82802ab.c) */ .erase = NULL, .block_erasers = { { diff --git a/flashchips.h b/flashchips.h index 2a4d93b..ff04568 100644 --- a/flashchips.h +++ b/flashchips.h @@ -244,26 +244,29 @@ #define HY_29LV400T 0xB9 #define HY_29LV400B 0xBA #define HY_29F080 0xD5 #define HY_29F800T 0xD6 /* Same as HY_29F800AT */ #define HY_29LV800T 0xDA #define IMT_ID 0x7F1F /* Integrated Memory Technologies */ #define IM_29F004B 0xAE #define IM_29F004T 0xAF #define INTEL_ID 0x89 /* Intel */ #define I_82802AB 0xAD #define I_82802AC 0xAC +#define E_28F004S5 0xA7 +#define E_28F008S5 0xA6 +#define E_28F016S5 0xAA #define P28F001BXT 0x94 /* 28F001BX-T */ #define P28F001BXB 0x95 /* 28F001BX-B */ #define SHARP_LH28F008SA 0xA2 /* Sharp chip, Intel Vendor ID */ #define SHARP_LH28F008SC 0xA6 /* Sharp chip, Intel Vendor ID */ #define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */ /* * MX25 chips are SPI, first byte of device ID is memory type, * second byte of device ID is log(bitsize)-9. * Generalplus SPI chips seem to be compatible with Macronix * and use the same set of IDs. */