Hi,

I am using the latest flashrom. I am unable to flashBIOS using dediprog sf 100 programmer.

The log is pasted below. Please help.

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arun@arun-OptiPlex-9010:~/work/vview/flashrom$ sudo flashrom -p internal -w BYTI_072_011_ReleasePackage/BYTICRB__X64_R_0072_11_SeC_Enable.bin -V

flashrom v0.9.7-r1764 on Linux 3.5.0-45-generic (x86_64)

flashrom is free software, get the source code at http://www.flashrom.org

flashrom was built with libpci 3.1.8, GCC 4.6.3, little endian

Command line (5 args): flashrom -p internal -w BYTI_072_011_ReleasePackage/BYTICRB__X64_R_0072_11_SeC_Enable.bin -V

Calibrating delay loop... OS timer resolution is 1 usecs, 3881M loops per second, 10 myus = 10 us, 100 myus = 99 us, 1000 myus = 999 us, 10000 myus = 10006 us, 4 myus = 5 us, OK.

Initializing internal programmer

No coreboot table found.

Using Internal DMI decoder.

DMI string chassis-type: "Mini Tower"

DMI string system-manufacturer: "Dell Inc."

DMI string system-product-name: "OptiPlex 9010"

DMI string system-version: "01"

DMI string baseboard-manufacturer: "Dell Inc."

DMI string baseboard-product-name: "0M9KCM"

DMI string baseboard-version: "A02"

Found chipset "Intel Q77" with PCI ID 8086:1e47. 

This chipset is marked as untested. If you are using an up-to-date version

of flashrom *and* were (not) able to successfully update your firmware with it,

then please email a report to flashrom@flashrom.org including a verbose (-V) log.

Thank you!

Enabling flash write... Root Complex Register Block address = 0xfed1c000

GCS = 0xc61: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (SPI)

Top Swap : not enabled

0xfff80000/0xffb80000 FWH IDSEL: 0x0

0xfff00000/0xffb00000 FWH IDSEL: 0x0

0xffe80000/0xffa80000 FWH IDSEL: 0x1

0xffe00000/0xffa00000 FWH IDSEL: 0x1

0xffd80000/0xff980000 FWH IDSEL: 0x2

0xffd00000/0xff900000 FWH IDSEL: 0x2

0xffc80000/0xff880000 FWH IDSEL: 0x3

0xffc00000/0xff800000 FWH IDSEL: 0x3

0xff700000/0xff300000 FWH IDSEL: 0x4

0xff600000/0xff200000 FWH IDSEL: 0x5

0xff500000/0xff100000 FWH IDSEL: 0x6

0xff400000/0xff000000 FWH IDSEL: 0x7

0xfff80000/0xffb80000 FWH decode enabled

0xfff00000/0xffb00000 FWH decode enabled

0xffe80000/0xffa80000 FWH decode enabled

0xffe00000/0xffa00000 FWH decode enabled

0xffd80000/0xff980000 FWH decode enabled

0xffd00000/0xff900000 FWH decode enabled

0xffc80000/0xff880000 FWH decode enabled

0xffc00000/0xff800000 FWH decode enabled

0xff700000/0xff300000 FWH decode enabled

0xff600000/0xff200000 FWH decode enabled

0xff500000/0xff100000 FWH decode enabled

0xff400000/0xff000000 FWH decode enabled

Maximum FWH chip size: 0x100000 bytesSPI Read Configuration: prefetching enabled, caching enabled, 

BIOS_CNTL = 0x0a: BIOS Lock Enable: enabled, BIOS Write Enable: disabled

Warning: Setting Bios Control at 0xdc from 0x0a to 0x09 failed.

New value is 0x0a.

SPIBAR = 0x00007f669c2d9000 + 0x3800

0x04: 0xe008 (HSFS)

HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1

Warning: SPI Configuration Lockdown activated.

Reading OPCODES... done

0x06: 0x3f00 (HSFC)

HSFC: FGO=0, FCYCLE=0, FDBC=63, SME=0

0x50: 0x00000a0b (FRAP)

BMWAG 0x00, BMRAG 0x00, BRWA 0x0a, BRRA 0x0b

0x54: 0x00000000 FREG0: Warning: Flash Descriptor region (0x00000000-0x00000fff) is read-only.

0x58: 0x0bff0600 FREG1: BIOS region (0x00600000-0x00bfffff) is read-write.

0x5C: 0x05ff0005 FREG2: Warning: Management Engine region (0x00005000-0x005fffff) is locked.

0x60: 0x00040001 FREG3: Gigabit Ethernet region (0x00001000-0x00004fff) is read-write.

Not all flash regions are freely accessible by flashrom. This is most likely

due to an active ME. Please see http://flashrom.org/ME for details.

Writes have been disabled for safety reasons. You can enforce write

support with the ich_spi_force programmer option, but you will most likely

harm your hardware! If you force flashrom you will get no support if

something breaks. On a few mainboards it is possible to enable write

access by setting a jumper (see its documentation or the board itself).

0x90: 0xc0 (SSFS)

SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0

0x91: 0xf84030 (SSFC)

SSFC: SCGO=0, ACS=0, SPOP=0, COP=3, DBC=0, SME=0, SCF=0

0x94: 0x0006     (PREOP)

0x96: 0x043b     (OPTYPE)

0x98: 0x05200302 (OPMENU)

0x9C: 0x0000019f (OPMENU+4)

0xA0: 0x00000000 (BBAR)

0xC4: 0x00802005 (LVSCC)

LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1

0xC8: 0x00002005 (UVSCC)

UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0

0xD0: 0x00000800 (FPB)

Enabling hardware sequencing due to multiple flash chips detected.

PROBLEMS, continuing anyway

The following protocols are supported: FWH, Programmer-specific.

Probing for Programmer Opaque flash chip, 0 kB: Found 2 attached SPI flash chips with a combined density of 12288 kB.

The flash address space (0x000000 - 0xbfffff) is divided at address 0x800000 in two partitions.

The first partition ranges from 0x000000 to 0x7fffff.

In that range are 2048 erase blocks with 4096 B each.

The second partition ranges from 0x800000 to 0xbfffff.

In that range are 1024 erase blocks with 4096 B each.

Found Programmer flash chip "Opaque flash chip" (12288 kB, Programmer-specific) at physical address 0x0.

Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content

Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Found Programmer flash chip "Opaque flash chip" (12288 kB, Programmer-specific).

Write/erase is not working yet on your programmer in its current configuration.

Aborting.

Restoring MMIO space at 0x7f669c2dc8a0

Restoring PCI config space for 00:1f:0 reg 0xdc

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Regards,

Arun C