flashrom v0.9.8-r1888 on Linux 3.19.3-1-desktop (x86_64)
flashrom was built with libpci 3.3.0, GCC 4.8.3 20141208 [gcc-4_8-branch revision 218481], little endian
Command line (8 args): /usr/sbin/flashrom -p internal -c SST25LF040A -Vr _8I945GZME-RH_BIOSF608_29_2006__20150429220348.flash -o _8I945GZME-RH_BIOSF608_29_2006__20150429220348.flash_read.txt
Calibrating delay loop... OS timer resolution is 1 usecs, 1190M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us, 10000 myus = 9973 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
Using Internal DMI decoder.
DMI string chassis-type: "Desktop"
DMI string system-manufacturer: " "
DMI string system-product-name: " "
DMI string system-version: " "
DMI string baseboard-manufacturer: "Gigabyte Technology Co., Ltd."
DMI string baseboard-product-name: "8I945GZME-RH"
DMI string baseboard-version: "x.x"
Found ITE Super I/O, ID 0x8718 on port 0x2e
Found chipset "Intel ICH7/ICH7R" with PCI ID 8086:27b8.
Enabling flash write... Root Complex Register Block address = 0xfed1c000
GCS = 0x464: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x1 (SPI)
Top Swap: not enabled
0xfff80000/0xffb80000 FWH IDSEL: 0x0
0xfff00000/0xffb00000 FWH IDSEL: 0x0
0xffe80000/0xffa80000 FWH IDSEL: 0x1
0xffe00000/0xffa00000 FWH IDSEL: 0x1
0xffd80000/0xff980000 FWH IDSEL: 0x2
0xffd00000/0xff900000 FWH IDSEL: 0x2
0xffc80000/0xff880000 FWH IDSEL: 0x3
0xffc00000/0xff800000 FWH IDSEL: 0x3
0xff700000/0xff300000 FWH IDSEL: 0x4
0xff600000/0xff200000 FWH IDSEL: 0x5
0xff500000/0xff100000 FWH IDSEL: 0x6
0xff400000/0xff000000 FWH IDSEL: 0x7
0xfff80000/0xffb80000 FWH decode enabled
0xfff00000/0xffb00000 FWH decode enabled
0xffe80000/0xffa80000 FWH decode disabled
0xffe00000/0xffa00000 FWH decode disabled
0xffd80000/0xff980000 FWH decode disabled
0xffd00000/0xff900000 FWH decode disabled
0xffc80000/0xff880000 FWH decode disabled
0xffc00000/0xff800000 FWH decode disabled
0xff700000/0xff300000 FWH decode disabled
0xff600000/0xff200000 FWH decode disabled
0xff500000/0xff100000 FWH decode disabled
0xff400000/0xff000000 FWH decode disabled
Maximum FWH chip size: 0x100000 bytes
SPI Read Configuration: prefetching disabled, caching enabled, 
BIOS_CNTL = 0x01: BIOS Lock Enable: disabled, BIOS Write Enable: enabled
SPIBAR = 0x00007fb3f2599000 + 0x3020
0x00: 0x0004     (SPIS)
0x02: 0x4140     (SPIC)
0x04: 0x00000000 (SPIA)
0x50: 0x00000000 (BBAR)
0x54: 0x5006     (PREOP)
0x56: 0x0bb4     (OPTYPE)
0x58: 0x90200105 (OPMENU)
0x5c: 0x00000302 (OPMENU+4)
0x60: 0x00000000 (PBR0)
0x64: 0x00000000 (PBR1)
0x68: 0x00000000 (PBR2)
Programming OPCODES... 
program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190
done
        OP        Type      Pre-OP
op[0]: 0x02, write w/  addr, none
op[1]: 0x03, read  w/  addr, none
op[2]: 0xd8, write w/  addr, none
op[3]: 0x05, read  w/o addr, none
op[4]: 0x90, read  w/  addr, none
op[5]: 0x01, write w/o addr, none
op[6]: 0x9f, read  w/o addr, none
op[7]: 0xc7, write w/o addr, none
Pre-OP 0: 0x06, Pre-OP 1: 0x50
OK.
No IT87* serial flash segment enabled.
The following protocols are supported: FWH, SPI.
Probing for SST SST25LF040A, 512 kB: 
program_opcodes: preop=5006 optype=462b opmenu=05ab0302c79f0190
on-the-fly OPCODE (0xAB) re-programmed, op-pos=2
probe_spi_res2: id1 0xbf, id2 0x44
Found SST flash chip "SST25LF040A" (512 kB, SPI) mapped at physical address 0x00000000fff80000.
Chip status register is 0x00.
Chip status register: Block Protect Write Disable (BPL) is not set
Chip status register: Auto Address Increment Programming (AAI) is not set
Chip status register: Block Protect 3 (BP3) is not set
Chip status register: Block Protect 2 (BP2) is not set
Chip status register: Block Protect 1 (BP1) is not set
Chip status register: Block Protect 0 (BP0) is not set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Block protection is disabled.
Reading flash... done.
Restoring MMIO space at 0x7fb3f259c070
Restoring MMIO space at 0x7fb3f259c07c
Restoring MMIO space at 0x7fb3f259c078
Restoring MMIO space at 0x7fb3f259c076
Restoring MMIO space at 0x7fb3f259c074
Restoring PCI config space for 00:1f:0 reg 0xdc