>From 0d0d8cf0f174e97eae9df832e41ad8cb1c5ff922 Mon Sep 17 00:00:00 2001
From: Tadas Slotkus <devtadas@gmail.com>
Date: Sun, 21 Aug 2011 14:17:10 +0300
Subject: [carFl mem 55/65] Move superio_count, ichspi_bbar to globals

Now these are in globals structure:
extern int superio_count;
extern uint32_t ichspi_bbar;

Signed-off-by: Tadas Slotkus <devtadas@gmail.com>
---
 flash.h      |    3 +++
 flashrom.c   |    3 +++
 ichspi.c     |   32 +++++++++++++++-----------------
 internal.c   |    5 ++---
 it87spi.c    |    2 +-
 programmer.h |    2 --
 spi.c        |    2 +-
 7 files changed, 25 insertions(+), 24 deletions(-)

diff --git a/flash.h b/flash.h
index 54fb60d..4389e0e 100644
--- a/flash.h
+++ b/flash.h
@@ -305,6 +305,9 @@ struct globals {
 	int force_boardenable;
 	int force_boardmismatch;
 	int has_dmi_support;
+
+	int superio_count;
+	uint32_t ichspi_bbar;
 };
 void init_globals(globals *g);
 
diff --git a/flashrom.c b/flashrom.c
index 2bbec8a..68f8da5 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -60,6 +60,9 @@ void init_globals(globals *g)
 	g->force_boardenable = 0;
 	g->force_boardmismatch = 0;
 	g->has_dmi_support = 0;
+
+	g->superio_count = 0;
+	g->ichspi_bbar = 0;
 }
 
 static char *programmer_param = NULL;
diff --git a/ichspi.c b/ichspi.c
index ffa4314..3c7c800 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -163,8 +163,6 @@
 /* ICH SPI configuration lock-down. May be set during chipset enabling. */
 static int ichspi_lock = 0;
 
-uint32_t ichspi_bbar = 0;
-
 static void *ich_spibar = NULL;
 
 typedef struct _OPCODE {
@@ -564,20 +562,20 @@ static void ich_set_bbar(globals *g, uint32_t min_addr)
 		return;
 	}
 	
-	ichspi_bbar = mmio_readl(ich_spibar + bbar_off) & ~BBAR_MASK;
-	if (ichspi_bbar) {
+	g->ichspi_bbar = mmio_readl(ich_spibar + bbar_off) & ~BBAR_MASK;
+	if (g->ichspi_bbar) {
 		msg_pdbg("Reserved bits in BBAR not zero: 0x%08x\n",
-			 ichspi_bbar);
+			 g->ichspi_bbar);
 	}
 	min_addr &= BBAR_MASK;
-	ichspi_bbar |= min_addr;
-	rmmio_writel(g, ichspi_bbar, ich_spibar + bbar_off);
-	ichspi_bbar = mmio_readl(ich_spibar + bbar_off) & BBAR_MASK;
+	g->ichspi_bbar |= min_addr;
+	rmmio_writel(g, g->ichspi_bbar, ich_spibar + bbar_off);
+	g->ichspi_bbar = mmio_readl(ich_spibar + bbar_off) & BBAR_MASK;
 
 	/* We don't have any option except complaining. And if the write
 	 * failed, the restore will fail as well, so no problem there.
 	 */
-	if (ichspi_bbar != min_addr)
+	if (g->ichspi_bbar != min_addr)
 		msg_perr("Setting BBAR failed!\n");
 }
 
@@ -1011,10 +1009,10 @@ static int ich_spi_send_command(globals *g, unsigned int writecnt, unsigned int
 		case SPI_CONTROLLER_ICH7:
 		case SPI_CONTROLLER_VIA:
 		case SPI_CONTROLLER_ICH9:
-			if (addr < ichspi_bbar) {
+			if (addr < g->ichspi_bbar) {
 				msg_perr("%s: Address 0x%06x below allowed "
 					 "range 0x%06x-0xffffff\n", __func__,
-					 addr, ichspi_bbar);
+					 addr, g->ichspi_bbar);
 				return SPI_INVALID_ADDRESS;
 			}
 			break;
@@ -1231,9 +1229,9 @@ int ich_init_spi(globals *g, struct pci_dev *dev, uint32_t base, void *rcrb,
 			msg_pdbg("0x%02x: 0x%08x (SPID%d+4)\n", offs + 4,
 				     mmio_readl(ich_spibar + offs + 4), i);
 		}
-		ichspi_bbar = mmio_readl(ich_spibar + 0x50);
+		g->ichspi_bbar = mmio_readl(ich_spibar + 0x50);
 		msg_pdbg("0x50: 0x%08x (BBAR)\n",
-			     ichspi_bbar);
+			     g->ichspi_bbar);
 		msg_pdbg("0x54: 0x%04x     (PREOP)\n",
 			     mmio_readw(ich_spibar + 0x54));
 		msg_pdbg("0x56: 0x%04x     (OPTYPE)\n",
@@ -1309,9 +1307,9 @@ int ich_init_spi(globals *g, struct pci_dev *dev, uint32_t base, void *rcrb,
 			     mmio_readl(ich_spibar + ICH9_REG_OPMENU));
 		msg_pdbg("0x9C: 0x%08x (OPMENU+4)\n",
 			     mmio_readl(ich_spibar + ICH9_REG_OPMENU + 4));
-		ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR);
+		g->ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR);
 		msg_pdbg("0xA0: 0x%08x (BBAR)\n",
-			     ichspi_bbar);
+			     g->ichspi_bbar);
 		tmp = mmio_readl(ich_spibar + ICH9_REG_FPB);
 		msg_pdbg("0xD0: 0x%08x (FPB)\n", tmp);
 
@@ -1374,8 +1372,8 @@ int via_init_spi(globals *g, struct pci_dev *dev)
 		msg_pdbg("0x%02x: 0x%08x (SPID%d+4)\n", offs + 4,
 			 mmio_readl(ich_spibar + offs + 4), i);
 	}
-	ichspi_bbar = mmio_readl(ich_spibar + 0x50);
-	msg_pdbg("0x50: 0x%08x (BBAR)\n", ichspi_bbar);
+	g->ichspi_bbar = mmio_readl(ich_spibar + 0x50);
+	msg_pdbg("0x50: 0x%08x (BBAR)\n", g->ichspi_bbar);
 	msg_pdbg("0x54: 0x%04x     (PREOP)\n", mmio_readw(ich_spibar + 0x54));
 	msg_pdbg("0x56: 0x%04x     (OPTYPE)\n", mmio_readw(ich_spibar + 0x56));
 	msg_pdbg("0x58: 0x%08x (OPMENU)\n", mmio_readl(ich_spibar + 0x58));
diff --git a/internal.c b/internal.c
index 94b9d0b..c29bf41 100644
--- a/internal.c
+++ b/internal.c
@@ -107,16 +107,15 @@ void probe_superio(globals *g)
 #endif
 }
 
-int superio_count = 0;
 #define SUPERIO_MAX_COUNT 3
 
 struct superio superios[SUPERIO_MAX_COUNT];
 
 int register_superio(globals *g, struct superio s)
 {
-	if (superio_count == SUPERIO_MAX_COUNT)
+	if (g->superio_count == SUPERIO_MAX_COUNT)
 		return 1;
-	superios[superio_count++] = s;
+	superios[g->superio_count++] = s;
 	return 0;
 }
 
diff --git a/it87spi.c b/it87spi.c
index 7cd1c11..d853e29 100644
--- a/it87spi.c
+++ b/it87spi.c
@@ -205,7 +205,7 @@ int init_superio_ite(globals *g)
 {
 	int i, ret = 0;
 
-	for (i = 0; i < superio_count; i++) {
+	for (i = 0; i < g->superio_count; i++) {
 		if (superios[i].vendor != SUPERIO_VENDOR_ITE)
 			continue;
 
diff --git a/programmer.h b/programmer.h
index 8c6b8df..13c15fa 100644
--- a/programmer.h
+++ b/programmer.h
@@ -219,7 +219,6 @@ struct superio {
 	uint16_t model;
 };
 extern struct superio superios[];
-extern int superio_count;
 #define SUPERIO_VENDOR_NONE	0x0
 #define SUPERIO_VENDOR_ITE	0x1
 #endif
@@ -500,7 +499,6 @@ void register_spi_programmer(globals *g, const struct spi_programmer *programmer
 
 /* ichspi.c */
 #if CONFIG_INTERNAL == 1
-extern uint32_t ichspi_bbar;
 int ich_init_spi(globals *g, struct pci_dev *dev, uint32_t base, void *rcrb,
 		    int ich_generation);
 int via_init_spi(globals *g, struct pci_dev *dev);
diff --git a/spi.c b/spi.c
index 5fa1e88..46b03d8 100644
--- a/spi.c
+++ b/spi.c
@@ -184,7 +184,7 @@ uint32_t spi_get_valid_read_addr(globals *g)
 #if defined(__i386__) || defined(__x86_64__)
 	case SPI_CONTROLLER_ICH7:
 		/* Return BBAR for ICH chipsets. */
-		return ichspi_bbar;
+		return g->ichspi_bbar;
 #endif
 #endif
 	default:
-- 
1.7.6

