>From cd25beb0db1246ef44b9d89ba8b6f6ad3b10a868 Mon Sep 17 00:00:00 2001
From: Tadas Slotkus <devtadas@gmail.com>
Date: Sun, 21 Aug 2011 00:16:58 +0300
Subject: [carFl mem 50/65] Move buses_supported to globals struct

Move this variable to globals structure.

Signed-off-by: Tadas Slotkus <devtadas@gmail.com>
---
 board_enable.c   |    2 +-
 chipset_enable.c |   26 +++++++++++++-------------
 cli_classic.c    |    2 +-
 dummyflasher.c   |   10 +++++-----
 flash.h          |    4 +++-
 flashrom.c       |    9 +++------
 ichspi.c         |    2 +-
 internal.c       |    2 +-
 it85spi.c        |    6 +++---
 it87spi.c        |    2 +-
 spi.c            |    2 +-
 11 files changed, 33 insertions(+), 34 deletions(-)

diff --git a/board_enable.c b/board_enable.c
index 4b1bbfc..6d88e77 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -425,7 +425,7 @@ int it8705f_write_enable(globals *g, uint8_t port)
 	/* Check if at least one flash segment is enabled. */
 	if (tmp & 0xf0) {
 		/* The IT8705F will respond to LPC cycles and translate them. */
-		buses_supported = BUS_PARALLEL;
+		g->buses_supported = BUS_PARALLEL;
 		/* Flash ROM I/F Writes Enable */
 		tmp |= 0x04;
 		msg_pdbg("Enabling IT8705F flash ROM interface write.\n");
diff --git a/chipset_enable.c b/chipset_enable.c
index 05dfcf1..ecbe739 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -213,7 +213,7 @@ static int enable_flash_piix4(globals *g, struct pci_dev *dev, const char *name)
 	uint16_t old, new;
 	uint16_t xbcs = 0x4e;	/* X-Bus Chip Select register. */
 
-	buses_supported = BUS_PARALLEL;
+	g->buses_supported = BUS_PARALLEL;
 
 	old = pci_read_word(dev, xbcs);
 
@@ -302,7 +302,7 @@ static int enable_flash_ich_4e(globals *g, struct pci_dev *dev, const char *name
 	 * FWH_DEC_EN1, but they are called FB_SEL1, FB_SEL2, FB_DEC_EN1 and
 	 * FB_DEC_EN2.
 	 */
-	buses_supported = BUS_FWH;
+	g->buses_supported = BUS_FWH;
 	return enable_flash_ich(g, dev, name, 0x4e);
 }
 
@@ -415,7 +415,7 @@ idsel_garbage_out:
 	/* If we're called by enable_flash_ich_dc_spi, it will override
 	 * buses_supported anyway.
 	 */
-	buses_supported = BUS_FWH;
+	g->buses_supported = BUS_FWH;
 	return enable_flash_ich(g, dev, name, 0xdc);
 }
 
@@ -435,7 +435,7 @@ static int enable_flash_poulsbo(globals *g, struct pci_dev *dev, const char *nam
 	if (new != old)
 		rpci_write_byte(g, dev, 0xd9, new);
 
-	buses_supported = BUS_FWH;
+	g->buses_supported = BUS_FWH;
 	return 0;
 }
 
@@ -491,14 +491,14 @@ static int enable_flash_ich_dc_spi(globals *g, struct pci_dev *dev, const char *
 	 * on ICH7 when the southbridge is strapped to LPC
 	 */
 
-	buses_supported = BUS_FWH;
+	g->buses_supported = BUS_FWH;
 	if (ich_generation == 7) {
 		if (bbs == ICH_STRAP_LPC) {
 			/* No further SPI initialization required */
 			return ret;
 		} else {
 			/* Disable LPC/FWH if strapped to PCI or SPI */
-			buses_supported = 0;
+			g->buses_supported = 0;
 		}
 	}
 
@@ -589,7 +589,7 @@ static int enable_flash_cs5530(globals *g, struct pci_dev *dev, const char *name
 #define CS5530_ENABLE_SA2320		(1 << 2)
 #define CS5530_ENABLE_SA20		(1 << 6)
 
-	buses_supported = BUS_PARALLEL;
+	g->buses_supported = BUS_PARALLEL;
 	/* Decode 0x000E0000-0x000FFFFF (128 kB), not just 64 kB, and
 	 * decode 0xFF000000-0xFFFFFFFF (16 MB), not just 256 kB.
 	 * FIXME: Should we really touch the low mapping below 1 MB? Flashrom
@@ -742,7 +742,7 @@ static int enable_flash_sb600(globals *g, struct pci_dev *dev, const char *name)
 				 (prot & 0xfffff800) + (((prot & 0x7fc) << 8) | 0x3ff));
 	}
 
-	buses_supported = BUS_LPC | BUS_FWH;
+	g->buses_supported = BUS_LPC | BUS_FWH;
 
 	ret = sb600_probe_spi(g, dev);
 
@@ -836,7 +836,7 @@ static int enable_flash_osb4(globals *g, struct pci_dev *dev, const char *name)
 {
 	uint8_t tmp;
 
-	buses_supported = BUS_PARALLEL;
+	g->buses_supported = BUS_PARALLEL;
 
 	tmp = INB(0xc06);
 	tmp |= 0x1;
@@ -936,7 +936,7 @@ static int enable_flash_mcp6x_7x(globals *g, struct pci_dev *dev, const char *na
 	switch ((val >> 5) & 0x3) {
 	case 0x0:
 		ret = enable_flash_mcp55(g, dev, name);
-		buses_supported = BUS_LPC;
+		g->buses_supported = BUS_LPC;
 		msg_pdbg("Flash bus type is LPC\n");
 		break;
 	case 0x2:
@@ -944,7 +944,7 @@ static int enable_flash_mcp6x_7x(globals *g, struct pci_dev *dev, const char *na
 		/* SPI is added in mcp6x_spi_init if it works.
 		 * Do we really want to disable LPC in this case?
 		 */
-		buses_supported = BUS_NONE;
+		g->buses_supported = BUS_NONE;
 		msg_pdbg("Flash bus type is SPI\n");
 		msg_pinfo("SPI on this chipset is WIP. Please report any "
 			  "success or failure by mailing us the verbose "
@@ -952,7 +952,7 @@ static int enable_flash_mcp6x_7x(globals *g, struct pci_dev *dev, const char *na
 		break;
 	default:
 		/* Should not happen. */
-		buses_supported = BUS_NONE;
+		g->buses_supported = BUS_NONE;
 		msg_pdbg("Flash bus type is unknown (none)\n");
 		msg_pinfo("Something went wrong with bus type detection.\n");
 		goto out_msg;
@@ -1290,7 +1290,7 @@ int chipset_flash_enable(globals *g)
 			msg_pinfo("PROBLEMS, continuing anyway\n");
 	}
 
-	s = flashbuses_to_text(buses_supported);
+	s = flashbuses_to_text(g->buses_supported);
 	msg_pinfo("This chipset supports the following protocols: %s.\n", s);
 	free(s);
 
diff --git a/cli_classic.c b/cli_classic.c
index 30afee6..cd4014b 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -410,7 +410,7 @@ int cli_classic(globals *g, int argc, char *argv[])
 	check_chip_supported(fill_flash);
 
 	size = fill_flash->total_size * 1024;
-	if (check_max_decode(g, (buses_supported & fill_flash->bustype), size) &&
+	if (check_max_decode(g, (g->buses_supported & fill_flash->bustype), size) &&
 	    (!force)) {
 		fprintf(stderr, "Chip is too big for this programmer "
 			"(-V gives details). Use --force to override.\n");
diff --git a/dummyflasher.c b/dummyflasher.c
index 05e389b..aa9e7d4 100644
--- a/dummyflasher.c
+++ b/dummyflasher.c
@@ -108,24 +108,24 @@ int dummy_init(globals *g)
 	/* Convert the parameters to lowercase. */
 	tolower_string(bustext);
 
-	buses_supported = BUS_NONE;
+	g->buses_supported = BUS_NONE;
 	if (strstr(bustext, "parallel")) {
-		buses_supported |= BUS_PARALLEL;
+		g->buses_supported |= BUS_PARALLEL;
 		msg_pdbg("Enabling support for %s flash.\n", "parallel");
 	}
 	if (strstr(bustext, "lpc")) {
-		buses_supported |= BUS_LPC;
+		g->buses_supported |= BUS_LPC;
 		msg_pdbg("Enabling support for %s flash.\n", "LPC");
 	}
 	if (strstr(bustext, "fwh")) {
-		buses_supported |= BUS_FWH;
+		g->buses_supported |= BUS_FWH;
 		msg_pdbg("Enabling support for %s flash.\n", "FWH");
 	}
 	if (strstr(bustext, "spi")) {
 		register_spi_programmer(g, &spi_programmer_dummyflasher);
 		msg_pdbg("Enabling support for %s flash.\n", "SPI");
 	}
-	if (buses_supported == BUS_NONE)
+	if (g->buses_supported == BUS_NONE)
 		msg_pdbg("Support for all flash bus types disabled.\n");
 	//free(bustext);
 
diff --git a/flash.h b/flash.h
index bb97df0..6c8f1dc 100644
--- a/flash.h
+++ b/flash.h
@@ -205,7 +205,6 @@ enum write_granularity {
 	write_gran_1byte,
 	write_gran_256bytes,
 };
-extern enum chipbustype buses_supported;
 extern int verbose;
 extern const char flashrom_version[];
 extern char *chip_to_probe;
@@ -296,6 +295,9 @@ struct globals {
 	uint8_t undo_data_buf[256];
 	uint8_t *undo_data_free_ptr; //pointer to free space (for new undo data)
 	char tmp_buf[TMP_BUF_SIZE]; // for extract programmer param
+
+	/* Supported buses for the current programmer. */
+	enum chipbustype buses_supported;
 };
 void init_globals(globals *g);
 
diff --git a/flashrom.c b/flashrom.c
index 2dd1468..f4d763b 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -56,9 +56,6 @@ void init_globals(globals *g)
 
 static char *programmer_param = NULL;
 
-/* Supported buses for the current programmer. */
-enum chipbustype buses_supported;
-
 /*
  * Programmers supporting multiple buses can have differing size limits on
  * each bus. Store the limits for each bus in a common struct.
@@ -452,7 +449,7 @@ int programmer_init(globals *g, char *param)
 		.fwh		= 0xffffffff,
 		.spi		= 0xffffffff,
 	};
-	buses_supported = BUS_NONE;
+	g->buses_supported = BUS_NONE;
 	/* Default to top aligned flash at 4 GB. */
 	flashbase = 0;
 	/* Registering shutdown functions is now allowed. */
@@ -1077,11 +1074,11 @@ int probe_flash(globals *g, int startchip, struct flashchip *fill_flash, int for
 	for (flash = flashchips + startchip; flash && flash->name; flash++) {
 		if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0)
 			continue;
-		buses_common = buses_supported & flash->bustype;
+		buses_common = g->buses_supported & flash->bustype;
 		if (!buses_common) {
 			msg_gspew("Probing for %s %s, %d kB: skipped. ",
 			         flash->vendor, flash->name, flash->total_size);
-			tmp = flashbuses_to_text(buses_supported);
+			tmp = flashbuses_to_text(g->buses_supported);
 			msg_gspew("Host bus type %s ", tmp);
 			free(tmp);
 			tmp = flashbuses_to_text(flash->bustype);
diff --git a/ichspi.c b/ichspi.c
index 3160a5d..ffa4314 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -1360,7 +1360,7 @@ int via_init_spi(globals *g, struct pci_dev *dev)
 	ich_spibar = physmap("VT8237S MMIO registers", mmio_base, 0x70);
 
 	/* Not sure if it speaks all these bus protocols. */
-	buses_supported = BUS_LPC | BUS_FWH;
+	g->buses_supported = BUS_LPC | BUS_FWH;
 	register_spi_programmer(g, &spi_programmer_via);
 
 	msg_pdbg("0x00: 0x%04x     (SPIS)\n", mmio_readw(ich_spibar + 0));
diff --git a/internal.c b/internal.c
index 2301181..9f37d7b 100644
--- a/internal.c
+++ b/internal.c
@@ -190,7 +190,7 @@ int internal_init(globals *g)
 	/* Default to Parallel/LPC/FWH flash devices. If a known host controller
 	 * is found, the init routine sets the buses_supported bitfield.
 	 */
-	buses_supported = BUS_NONSPI;
+	g->buses_supported = BUS_NONSPI;
 
 	/* Initialize PCI access for flash enables */
 	pacc = pci_alloc();	/* Get the pci_access structure */
diff --git a/it85spi.c b/it85spi.c
index 71687a4..4f294f2 100644
--- a/it85spi.c
+++ b/it85spi.c
@@ -286,7 +286,7 @@ int it85xx_spi_init(globals *g, struct superio s)
 {
 	int ret;
 
-	if (!(buses_supported & BUS_FWH)) {
+	if (!(g->buses_supported & BUS_FWH)) {
 		msg_pdbg("%s():%d buses not support FWH\n", __func__, __LINE__);
 		return 1;
 	}
@@ -294,8 +294,8 @@ int it85xx_spi_init(globals *g, struct superio s)
 	msg_pdbg("FWH: %s():%d ret=%d\n", __func__, __LINE__, ret);
 	if (!ret) {
 		msg_pdbg("%s():%d buses_supported=0x%x\n", __func__, __LINE__,
-		          buses_supported);
-		if (buses_supported & BUS_FWH)
+		          g->buses_supported);
+		if (g->buses_supported & BUS_FWH)
 			msg_pdbg("Overriding chipset SPI with IT85 FWH|SPI.\n");
 		/* Really leave FWH enabled? */
 		/* Set this as SPI controller. */
diff --git a/it87spi.c b/it87spi.c
index 7f0bf4c..7cd1c11 100644
--- a/it87spi.c
+++ b/it87spi.c
@@ -194,7 +194,7 @@ static uint16_t it87spi_probe(globals *g, uint16_t port)
 //	free(portpos);
 	exit_conf_mode_ite(port);
 	it8716f_flashport = flashport;
-	if (buses_supported & BUS_SPI)
+	if (g->buses_supported & BUS_SPI)
 		msg_pdbg("Overriding chipset SPI with IT87 SPI.\n");
 	/* FIXME: Add the SPI bus or replace the other buses with it? */
 	register_spi_programmer(g, &spi_programmer_it87xx);
diff --git a/spi.c b/spi.c
index 923f2de..5fa1e88 100644
--- a/spi.c
+++ b/spi.c
@@ -195,5 +195,5 @@ uint32_t spi_get_valid_read_addr(globals *g)
 void register_spi_programmer(globals *g, const struct spi_programmer *pgm)
 {
 	spi_programmer = pgm;
-	buses_supported |= BUS_SPI;
+	g->buses_supported |= BUS_SPI;
 }
-- 
1.7.6

