Hello,


Here's a patch for using SPI from AMD SouthBridge (SB700, SP5100, ...) without having issue with Integrated MicroControler  (IMC) .

This issue has been reported by Carl-Daniel Hailfinger in ChangeSet 1173
http://flashrom.org/trac/flashrom/changeset/1173

AMD is now providing details about SP5100 register in document 44413:

http://support.amd.com/us/Embedded_TechDocs/44413.pdf

In this document (rev 3.02), we can see that a register is in charge of managing access to LPC (p 271 and 283)


=> with this patch, we take LPC ownership before each set of commands to SPI.
Ownership is released when command is done.


I did a test by reading BIOS in flash, and this is working nicely (without this patch, I wasn't able to read the BIOS).
Now, I don't have components to restore the BIOS in case of failure, so write test hasn't been done (yet)...

Note: this patch doesn't remove the write protection,
I'll sent a second patch which will remove this protection

Best regards

--
Fred